162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci# Copyright (C) Sunplus Co., Ltd. 362306a36Sopenharmony_ci%YAML 1.2 462306a36Sopenharmony_ci--- 562306a36Sopenharmony_ci$id: http://devicetree.org/schemas/pinctrl/sunplus,sp7021-pinctrl.yaml# 662306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 762306a36Sopenharmony_ci 862306a36Sopenharmony_cititle: Sunplus SP7021 Pin Controller 962306a36Sopenharmony_ci 1062306a36Sopenharmony_cimaintainers: 1162306a36Sopenharmony_ci - Dvorkin Dmitry <dvorkin@tibbo.com> 1262306a36Sopenharmony_ci - Wells Lu <wellslutw@gmail.com> 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_cidescription: | 1562306a36Sopenharmony_ci The Sunplus SP7021 pin controller is used to control SoC pins. Please 1662306a36Sopenharmony_ci refer to pinctrl-bindings.txt in this directory for details of the common 1762306a36Sopenharmony_ci pinctrl bindings used by client devices. 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci SP7021 has 99 digital GPIO pins which are numbered from GPIO 0 to 98. All 2062306a36Sopenharmony_ci are multiplexed with some special function pins. SP7021 has 3 types of 2162306a36Sopenharmony_ci special function pins: 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci (1) function-group pins: 2462306a36Sopenharmony_ci Ex 1 (SPI-NOR flash): 2562306a36Sopenharmony_ci If control-field SPI_FLASH_SEL is set to 1, GPIO 83, 84, 86 and 87 2662306a36Sopenharmony_ci will be pins of SPI-NOR flash. If it is set to 2, GPIO 76, 78, 79 2762306a36Sopenharmony_ci and 81 will be pins of SPI-NOR flash. 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci Ex 2 (UART_0): 3062306a36Sopenharmony_ci If control-bit UA0_SEL is set to 1, GPIO 88 and 89 will be TX and 3162306a36Sopenharmony_ci RX pins of UART_0 (UART channel 0). 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci Ex 3 (eMMC): 3462306a36Sopenharmony_ci If control-bit EMMC_SEL is set to 1, GPIO 72, 73, 74, 75, 76, 77, 3562306a36Sopenharmony_ci 78, 79, 80, 81 will be pins of an eMMC device. 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci Properties "function" and "groups" are used to select function-group 3862306a36Sopenharmony_ci pins. 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ci (2) fully pin-mux (like phone exchange mux) pins: 4162306a36Sopenharmony_ci GPIO 8 to 71 are 'fully pin-mux' pins. Any pins of peripherals of 4262306a36Sopenharmony_ci SP7021 (ex: UART_1, UART_2, UART_3, UART_4, I2C_0, I2C_1, and etc.) 4362306a36Sopenharmony_ci can be routed to any pins of fully pin-mux pins. 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci Ex 1 (UART channel 1): 4662306a36Sopenharmony_ci If control-field UA1_TX_SEL is set to 3, TX pin of UART_1 will be 4762306a36Sopenharmony_ci routed to GPIO 10 (3 - 1 + 8 = 10). 4862306a36Sopenharmony_ci If control-field UA1_RX_SEL is set to 4, RX pin of UART_1 will be 4962306a36Sopenharmony_ci routed to GPIO 11 (4 - 1 + 8 = 11). 5062306a36Sopenharmony_ci If control-field UA1_RTS_SEL is set to 5, RTS pin of UART_1 will 5162306a36Sopenharmony_ci be routed to GPIO 12 (5 - 1 + 8 = 12). 5262306a36Sopenharmony_ci If control-field UA1_CTS_SEL is set to 6, CTS pin of UART_1 will 5362306a36Sopenharmony_ci be routed to GPIO 13 (6 - 1 + 8 = 13). 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci Ex 2 (I2C channel 0): 5662306a36Sopenharmony_ci If control-field I2C0_CLK_SEL is set to 20, CLK pin of I2C_0 will 5762306a36Sopenharmony_ci be routed to GPIO 27 (20 - 1 + 8 = 27). 5862306a36Sopenharmony_ci If control-field I2C0_DATA_SEL is set to 21, DATA pin of I2C_0 5962306a36Sopenharmony_ci will be routed to GPIO 28 (21 - 1 + 9 = 28). 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_ci Totally, SP7021 has 120 peripheral pins. The peripheral pins can be 6262306a36Sopenharmony_ci routed to any of 64 'fully pin-mux' pins. 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci (3) I/O processor pins 6562306a36Sopenharmony_ci SP7021 has a built-in I/O processor. 6662306a36Sopenharmony_ci Any GPIO pins (GPIO 0 to 98) can be set to pins of I/O processor. 6762306a36Sopenharmony_ci 6862306a36Sopenharmony_ci Vendor property "sunplus,pins" is used to select "fully pin-mux" pins, 6962306a36Sopenharmony_ci "I/O processor pins" and "digital GPIO" pins. 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci The device node of pin controller of Sunplus SP7021 has following 7262306a36Sopenharmony_ci properties. 7362306a36Sopenharmony_ci 7462306a36Sopenharmony_ciproperties: 7562306a36Sopenharmony_ci compatible: 7662306a36Sopenharmony_ci const: sunplus,sp7021-pctl 7762306a36Sopenharmony_ci 7862306a36Sopenharmony_ci gpio-controller: true 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci '#gpio-cells': 8162306a36Sopenharmony_ci const: 2 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci reg: 8462306a36Sopenharmony_ci items: 8562306a36Sopenharmony_ci - description: the MOON2 registers 8662306a36Sopenharmony_ci - description: the GPIOXT registers 8762306a36Sopenharmony_ci - description: the FIRST registers 8862306a36Sopenharmony_ci - description: the MOON1 registers 8962306a36Sopenharmony_ci 9062306a36Sopenharmony_ci reg-names: 9162306a36Sopenharmony_ci items: 9262306a36Sopenharmony_ci - const: moon2 9362306a36Sopenharmony_ci - const: gpioxt 9462306a36Sopenharmony_ci - const: first 9562306a36Sopenharmony_ci - const: moon1 9662306a36Sopenharmony_ci 9762306a36Sopenharmony_ci clocks: 9862306a36Sopenharmony_ci maxItems: 1 9962306a36Sopenharmony_ci 10062306a36Sopenharmony_ci resets: 10162306a36Sopenharmony_ci maxItems: 1 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_cipatternProperties: 10462306a36Sopenharmony_ci '-pins$': 10562306a36Sopenharmony_ci type: object 10662306a36Sopenharmony_ci description: | 10762306a36Sopenharmony_ci A pinctrl node should contain at least one subnodes representing the 10862306a36Sopenharmony_ci pins or function-pins group available on the machine. Each subnode 10962306a36Sopenharmony_ci will list the pins it needs, and how they should be configured. 11062306a36Sopenharmony_ci 11162306a36Sopenharmony_ci Pinctrl node's client devices use subnodes for desired pin 11262306a36Sopenharmony_ci configuration. Client device subnodes use below standard properties. 11362306a36Sopenharmony_ci $ref: pinmux-node.yaml# 11462306a36Sopenharmony_ci 11562306a36Sopenharmony_ci properties: 11662306a36Sopenharmony_ci sunplus,pins: 11762306a36Sopenharmony_ci description: | 11862306a36Sopenharmony_ci Define 'sunplus,pins' which are used by pinctrl node's client 11962306a36Sopenharmony_ci device. 12062306a36Sopenharmony_ci 12162306a36Sopenharmony_ci It consists of one or more integers which represents the config 12262306a36Sopenharmony_ci setting for corresponding pin. Each integer defines a individual 12362306a36Sopenharmony_ci pin in which: 12462306a36Sopenharmony_ci 12562306a36Sopenharmony_ci Bit 32~24: defines GPIO number. Its range is 0 ~ 98. 12662306a36Sopenharmony_ci Bit 23~16: defines types: (1) fully pin-mux pins 12762306a36Sopenharmony_ci (2) IO processor pins 12862306a36Sopenharmony_ci (3) digital GPIO pins 12962306a36Sopenharmony_ci Bit 15~8: defines pins of peripherals (which are defined in 13062306a36Sopenharmony_ci 'include/dt-binging/pinctrl/sppctl.h'). 13162306a36Sopenharmony_ci Bit 7~0: defines types or initial-state of digital GPIO pins. 13262306a36Sopenharmony_ci 13362306a36Sopenharmony_ci Please use macro SPPCTL_IOPAD to define the integers for pins. 13462306a36Sopenharmony_ci 13562306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32-array 13662306a36Sopenharmony_ci 13762306a36Sopenharmony_ci function: 13862306a36Sopenharmony_ci description: | 13962306a36Sopenharmony_ci Define pin-function which is used by pinctrl node's client device. 14062306a36Sopenharmony_ci The name should be one of string in the following enumeration. 14162306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/string 14262306a36Sopenharmony_ci enum: [ SPI_FLASH, SPI_FLASH_4BIT, SPI_NAND, CARD0_EMMC, SD_CARD, 14362306a36Sopenharmony_ci UA0, FPGA_IFX, HDMI_TX, LCDIF, USB0_OTG, USB1_OTG ] 14462306a36Sopenharmony_ci 14562306a36Sopenharmony_ci groups: 14662306a36Sopenharmony_ci description: | 14762306a36Sopenharmony_ci Define pin-group in a specified pin-function. 14862306a36Sopenharmony_ci The name should be one of string in the following enumeration. 14962306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/string 15062306a36Sopenharmony_ci enum: [ SPI_FLASH1, SPI_FLASH2, SPI_FLASH_4BIT1, SPI_FLASH_4BIT2, 15162306a36Sopenharmony_ci SPI_NAND, CARD0_EMMC, SD_CARD, UA0, FPGA_IFX, HDMI_TX1, 15262306a36Sopenharmony_ci HDMI_TX2, HDMI_TX3, LCDIF, USB0_OTG, USB1_OTG ] 15362306a36Sopenharmony_ci 15462306a36Sopenharmony_ci sunplus,zerofunc: 15562306a36Sopenharmony_ci description: | 15662306a36Sopenharmony_ci This is a vendor specific property. It is used to disable pins 15762306a36Sopenharmony_ci which are not used by pinctrl node's client device. 15862306a36Sopenharmony_ci Some pins may be enabled by boot-loader. We can use this 15962306a36Sopenharmony_ci property to disable them. 16062306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32-array 16162306a36Sopenharmony_ci 16262306a36Sopenharmony_ci additionalProperties: false 16362306a36Sopenharmony_ci 16462306a36Sopenharmony_ci allOf: 16562306a36Sopenharmony_ci - if: 16662306a36Sopenharmony_ci properties: 16762306a36Sopenharmony_ci function: 16862306a36Sopenharmony_ci enum: 16962306a36Sopenharmony_ci - SPI_FLASH 17062306a36Sopenharmony_ci then: 17162306a36Sopenharmony_ci properties: 17262306a36Sopenharmony_ci groups: 17362306a36Sopenharmony_ci enum: 17462306a36Sopenharmony_ci - SPI_FLASH1 17562306a36Sopenharmony_ci - SPI_FLASH2 17662306a36Sopenharmony_ci - if: 17762306a36Sopenharmony_ci properties: 17862306a36Sopenharmony_ci function: 17962306a36Sopenharmony_ci enum: 18062306a36Sopenharmony_ci - SPI_FLASH_4BIT 18162306a36Sopenharmony_ci then: 18262306a36Sopenharmony_ci properties: 18362306a36Sopenharmony_ci groups: 18462306a36Sopenharmony_ci enum: 18562306a36Sopenharmony_ci - SPI_FLASH_4BIT1 18662306a36Sopenharmony_ci - SPI_FLASH_4BIT2 18762306a36Sopenharmony_ci - if: 18862306a36Sopenharmony_ci properties: 18962306a36Sopenharmony_ci function: 19062306a36Sopenharmony_ci enum: 19162306a36Sopenharmony_ci - SPI_NAND 19262306a36Sopenharmony_ci then: 19362306a36Sopenharmony_ci properties: 19462306a36Sopenharmony_ci groups: 19562306a36Sopenharmony_ci enum: 19662306a36Sopenharmony_ci - SPI_NAND 19762306a36Sopenharmony_ci - if: 19862306a36Sopenharmony_ci properties: 19962306a36Sopenharmony_ci function: 20062306a36Sopenharmony_ci enum: 20162306a36Sopenharmony_ci - CARD0_EMMC 20262306a36Sopenharmony_ci then: 20362306a36Sopenharmony_ci properties: 20462306a36Sopenharmony_ci groups: 20562306a36Sopenharmony_ci enum: 20662306a36Sopenharmony_ci - CARD0_EMMC 20762306a36Sopenharmony_ci - if: 20862306a36Sopenharmony_ci properties: 20962306a36Sopenharmony_ci function: 21062306a36Sopenharmony_ci enum: 21162306a36Sopenharmony_ci - SD_CARD 21262306a36Sopenharmony_ci then: 21362306a36Sopenharmony_ci properties: 21462306a36Sopenharmony_ci groups: 21562306a36Sopenharmony_ci enum: 21662306a36Sopenharmony_ci - SD_CARD 21762306a36Sopenharmony_ci - if: 21862306a36Sopenharmony_ci properties: 21962306a36Sopenharmony_ci function: 22062306a36Sopenharmony_ci enum: 22162306a36Sopenharmony_ci - UA0 22262306a36Sopenharmony_ci then: 22362306a36Sopenharmony_ci properties: 22462306a36Sopenharmony_ci groups: 22562306a36Sopenharmony_ci enum: 22662306a36Sopenharmony_ci - UA0 22762306a36Sopenharmony_ci - if: 22862306a36Sopenharmony_ci properties: 22962306a36Sopenharmony_ci function: 23062306a36Sopenharmony_ci enum: 23162306a36Sopenharmony_ci - FPGA_IFX 23262306a36Sopenharmony_ci then: 23362306a36Sopenharmony_ci properties: 23462306a36Sopenharmony_ci groups: 23562306a36Sopenharmony_ci enum: 23662306a36Sopenharmony_ci - FPGA_IFX 23762306a36Sopenharmony_ci - if: 23862306a36Sopenharmony_ci properties: 23962306a36Sopenharmony_ci function: 24062306a36Sopenharmony_ci enum: 24162306a36Sopenharmony_ci - HDMI_TX 24262306a36Sopenharmony_ci then: 24362306a36Sopenharmony_ci properties: 24462306a36Sopenharmony_ci groups: 24562306a36Sopenharmony_ci enum: 24662306a36Sopenharmony_ci - HDMI_TX1 24762306a36Sopenharmony_ci - HDMI_TX2 24862306a36Sopenharmony_ci - HDMI_TX3 24962306a36Sopenharmony_ci - if: 25062306a36Sopenharmony_ci properties: 25162306a36Sopenharmony_ci function: 25262306a36Sopenharmony_ci enum: 25362306a36Sopenharmony_ci - LCDIF 25462306a36Sopenharmony_ci then: 25562306a36Sopenharmony_ci properties: 25662306a36Sopenharmony_ci groups: 25762306a36Sopenharmony_ci enum: 25862306a36Sopenharmony_ci - LCDIF 25962306a36Sopenharmony_ci - if: 26062306a36Sopenharmony_ci properties: 26162306a36Sopenharmony_ci function: 26262306a36Sopenharmony_ci enum: 26362306a36Sopenharmony_ci - USB0_OTG 26462306a36Sopenharmony_ci then: 26562306a36Sopenharmony_ci properties: 26662306a36Sopenharmony_ci groups: 26762306a36Sopenharmony_ci enum: 26862306a36Sopenharmony_ci - USB0_OTG 26962306a36Sopenharmony_ci - if: 27062306a36Sopenharmony_ci properties: 27162306a36Sopenharmony_ci function: 27262306a36Sopenharmony_ci enum: 27362306a36Sopenharmony_ci - USB1_OTG 27462306a36Sopenharmony_ci then: 27562306a36Sopenharmony_ci properties: 27662306a36Sopenharmony_ci groups: 27762306a36Sopenharmony_ci enum: 27862306a36Sopenharmony_ci - USB1_OTG 27962306a36Sopenharmony_ci 28062306a36Sopenharmony_cirequired: 28162306a36Sopenharmony_ci - compatible 28262306a36Sopenharmony_ci - reg 28362306a36Sopenharmony_ci - reg-names 28462306a36Sopenharmony_ci - "#gpio-cells" 28562306a36Sopenharmony_ci - gpio-controller 28662306a36Sopenharmony_ci - clocks 28762306a36Sopenharmony_ci - resets 28862306a36Sopenharmony_ci 28962306a36Sopenharmony_ciadditionalProperties: false 29062306a36Sopenharmony_ci 29162306a36Sopenharmony_ciallOf: 29262306a36Sopenharmony_ci - $ref: pinctrl.yaml# 29362306a36Sopenharmony_ci 29462306a36Sopenharmony_ciexamples: 29562306a36Sopenharmony_ci - | 29662306a36Sopenharmony_ci #include <dt-bindings/pinctrl/sppctl-sp7021.h> 29762306a36Sopenharmony_ci 29862306a36Sopenharmony_ci pinctrl@9c000100 { 29962306a36Sopenharmony_ci compatible = "sunplus,sp7021-pctl"; 30062306a36Sopenharmony_ci reg = <0x9c000100 0x100>, <0x9c000300 0x100>, 30162306a36Sopenharmony_ci <0x9c0032e4 0x1c>, <0x9c000080 0x20>; 30262306a36Sopenharmony_ci reg-names = "moon2", "gpioxt", "first", "moon1"; 30362306a36Sopenharmony_ci gpio-controller; 30462306a36Sopenharmony_ci #gpio-cells = <2>; 30562306a36Sopenharmony_ci clocks = <&clkc 0x83>; 30662306a36Sopenharmony_ci resets = <&rstc 0x73>; 30762306a36Sopenharmony_ci 30862306a36Sopenharmony_ci uart0-pins { 30962306a36Sopenharmony_ci function = "UA0"; 31062306a36Sopenharmony_ci groups = "UA0"; 31162306a36Sopenharmony_ci }; 31262306a36Sopenharmony_ci 31362306a36Sopenharmony_ci spinand0-pins { 31462306a36Sopenharmony_ci function = "SPI_NAND"; 31562306a36Sopenharmony_ci groups = "SPI_NAND"; 31662306a36Sopenharmony_ci }; 31762306a36Sopenharmony_ci 31862306a36Sopenharmony_ci uart1-pins { 31962306a36Sopenharmony_ci sunplus,pins = < 32062306a36Sopenharmony_ci SPPCTL_IOPAD(11, SPPCTL_PCTL_G_PMUX, MUXF_UA1_TX, 0) 32162306a36Sopenharmony_ci SPPCTL_IOPAD(10, SPPCTL_PCTL_G_PMUX, MUXF_UA1_RX, 0) 32262306a36Sopenharmony_ci >; 32362306a36Sopenharmony_ci }; 32462306a36Sopenharmony_ci 32562306a36Sopenharmony_ci uart2-pins { 32662306a36Sopenharmony_ci sunplus,pins = < 32762306a36Sopenharmony_ci SPPCTL_IOPAD(20, SPPCTL_PCTL_G_PMUX, MUXF_UA1_TX, 0) 32862306a36Sopenharmony_ci SPPCTL_IOPAD(21, SPPCTL_PCTL_G_PMUX, MUXF_UA1_RX, 0) 32962306a36Sopenharmony_ci SPPCTL_IOPAD(22, SPPCTL_PCTL_G_PMUX, MUXF_UA1_RTS, 0) 33062306a36Sopenharmony_ci SPPCTL_IOPAD(23, SPPCTL_PCTL_G_PMUX, MUXF_UA1_CTS, 0) 33162306a36Sopenharmony_ci >; 33262306a36Sopenharmony_ci }; 33362306a36Sopenharmony_ci 33462306a36Sopenharmony_ci emmc-pins { 33562306a36Sopenharmony_ci function = "CARD0_EMMC"; 33662306a36Sopenharmony_ci groups = "CARD0_EMMC"; 33762306a36Sopenharmony_ci }; 33862306a36Sopenharmony_ci 33962306a36Sopenharmony_ci sdcard-pins { 34062306a36Sopenharmony_ci function = "SD_CARD"; 34162306a36Sopenharmony_ci groups = "SD_CARD"; 34262306a36Sopenharmony_ci sunplus,pins = < SPPCTL_IOPAD(91, SPPCTL_PCTL_G_GPIO, 0, 0) >; 34362306a36Sopenharmony_ci }; 34462306a36Sopenharmony_ci 34562306a36Sopenharmony_ci hdmi_A_tx1-pins { 34662306a36Sopenharmony_ci function = "HDMI_TX"; 34762306a36Sopenharmony_ci groups = "HDMI_TX1"; 34862306a36Sopenharmony_ci }; 34962306a36Sopenharmony_ci hdmi_A_tx2-pins { 35062306a36Sopenharmony_ci function = "HDMI_TX"; 35162306a36Sopenharmony_ci groups = "HDMI_TX2"; 35262306a36Sopenharmony_ci }; 35362306a36Sopenharmony_ci hdmi_A_tx3-pins { 35462306a36Sopenharmony_ci function = "HDMI_TX"; 35562306a36Sopenharmony_ci groups = "HDMI_TX3"; 35662306a36Sopenharmony_ci }; 35762306a36Sopenharmony_ci 35862306a36Sopenharmony_ci ethernet-pins { 35962306a36Sopenharmony_ci sunplus,pins = < 36062306a36Sopenharmony_ci SPPCTL_IOPAD(49,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_CLK_OUT,0) 36162306a36Sopenharmony_ci SPPCTL_IOPAD(44,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_MAC_SMI_MDC,0) 36262306a36Sopenharmony_ci SPPCTL_IOPAD(43,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_MAC_SMI_MDIO,0) 36362306a36Sopenharmony_ci SPPCTL_IOPAD(52,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P0_MAC_RMII_TXEN,0) 36462306a36Sopenharmony_ci SPPCTL_IOPAD(50,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P0_MAC_RMII_TXD0,0) 36562306a36Sopenharmony_ci SPPCTL_IOPAD(51,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P0_MAC_RMII_TXD1,0) 36662306a36Sopenharmony_ci SPPCTL_IOPAD(46,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P0_MAC_RMII_CRSDV,0) 36762306a36Sopenharmony_ci SPPCTL_IOPAD(47,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P0_MAC_RMII_RXD0,0) 36862306a36Sopenharmony_ci SPPCTL_IOPAD(48,SPPCTL_PCTL_G_PMUX,MUXF_L2SW_P0_MAC_RMII_RXD1,0) 36962306a36Sopenharmony_ci >; 37062306a36Sopenharmony_ci sunplus,zerofunc = < 37162306a36Sopenharmony_ci MUXF_L2SW_LED_FLASH0 37262306a36Sopenharmony_ci MUXF_L2SW_LED_ON0 37362306a36Sopenharmony_ci MUXF_L2SW_P0_MAC_RMII_RXER 37462306a36Sopenharmony_ci >; 37562306a36Sopenharmony_ci }; 37662306a36Sopenharmony_ci }; 37762306a36Sopenharmony_ci... 378