162306a36Sopenharmony_ci* Spreadtrum Pin Controller
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362306a36Sopenharmony_ciThe Spreadtrum pin controller are organized in 3 blocks (types).
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562306a36Sopenharmony_ciThe first block comprises some global control registers, and each
662306a36Sopenharmony_ciregister contains several bit fields with one bit or several bits
762306a36Sopenharmony_cito configure for some global common configuration, such as domain
862306a36Sopenharmony_cipad driving level, system control select and so on ("domain pad
962306a36Sopenharmony_cidriving level": One pin can output 3.0v or 1.8v, depending on the
1062306a36Sopenharmony_cirelated domain pad driving selection, if the related domain pad
1162306a36Sopenharmony_ciselect 3.0v, then the pin can output 3.0v. "system control" is used
1262306a36Sopenharmony_cito choose one function (like: UART0) for which system, since we
1362306a36Sopenharmony_cihave several systems (AP/CP/CM4) on one SoC.).
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1562306a36Sopenharmony_ciThere are too much various configuration that we can not list all
1662306a36Sopenharmony_ciof them, so we can not make every Spreadtrum-special configuration
1762306a36Sopenharmony_cias one generic configuration, and maybe it will add more strange
1862306a36Sopenharmony_ciglobal configuration in future. Then we add one "sprd,control" to
1962306a36Sopenharmony_ciset these various global control configuration, and we need use
2062306a36Sopenharmony_cimagic number for this property.
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2262306a36Sopenharmony_ciMoreover we recognise every fields comprising one bit or several
2362306a36Sopenharmony_cibits in one global control register as one pin, thus we should
2462306a36Sopenharmony_cirecord every pin's bit offset, bit width and register offset to
2562306a36Sopenharmony_ciconfigure this field (pin).
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2762306a36Sopenharmony_ciThe second block comprises some common registers which have unified
2862306a36Sopenharmony_ciregister definition, and each register described one pin is used
2962306a36Sopenharmony_cito configure the pin sleep mode, function select and sleep related
3062306a36Sopenharmony_ciconfiguration.
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3262306a36Sopenharmony_ciNow we have 4 systems for sleep mode on SC9860 SoC: AP system,
3362306a36Sopenharmony_ciPUBCP system, TGLDSP system and AGDSP system. And the pin sleep
3462306a36Sopenharmony_cirelated configuration are:
3562306a36Sopenharmony_ci- input-enable
3662306a36Sopenharmony_ci- input-disable
3762306a36Sopenharmony_ci- output-high
3862306a36Sopenharmony_ci- output-low
3962306a36Sopenharmony_ci- bias-pull-up
4062306a36Sopenharmony_ci- bias-pull-down
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4262306a36Sopenharmony_ciIn some situation we need set the pin sleep mode and pin sleep related
4362306a36Sopenharmony_ciconfiguration, to set the pin sleep related configuration automatically
4462306a36Sopenharmony_ciby hardware when the system specified by sleep mode goes into deep
4562306a36Sopenharmony_cisleep mode. For example, if we set the pin sleep mode as PUBCP_SLEEP
4662306a36Sopenharmony_ciand set the pin sleep related configuration as "input-enable", which
4762306a36Sopenharmony_cimeans when PUBCP system goes into deep sleep mode, this pin will be set
4862306a36Sopenharmony_ciinput enable automatically.
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5062306a36Sopenharmony_ciMoreover we can not use the "sleep" state, since some systems (like:
5162306a36Sopenharmony_ciPUBCP system) do not run linux kernel OS (only AP system run linux
5262306a36Sopenharmony_cikernel on SC9860 platform), then we can not select "sleep" state
5362306a36Sopenharmony_ciwhen the PUBCP system goes into deep sleep mode. Thus we introduce
5462306a36Sopenharmony_ci"sprd,sleep-mode" property to set pin sleep mode.
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5662306a36Sopenharmony_ciThe last block comprises some misc registers which also have unified
5762306a36Sopenharmony_ciregister definition, and each register described one pin is used to
5862306a36Sopenharmony_ciconfigure drive strength, pull up/down and so on. Especially for pull
5962306a36Sopenharmony_ciup, we have two kind pull up resistor: 20K and 4.7K.
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6162306a36Sopenharmony_ciRequired properties for Spreadtrum pin controller:
6262306a36Sopenharmony_ci- compatible: "sprd,<soc>-pinctrl"
6362306a36Sopenharmony_ci  Please refer to each sprd,<soc>-pinctrl.txt binding doc for supported SoCs.
6462306a36Sopenharmony_ci- reg: The register address of pin controller device.
6562306a36Sopenharmony_ci- pins : An array of pin names.
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6762306a36Sopenharmony_ciOptional properties:
6862306a36Sopenharmony_ci- function: Specified the function name.
6962306a36Sopenharmony_ci- drive-strength: Drive strength in mA.
7062306a36Sopenharmony_ci- input-schmitt-disable: Enable schmitt-trigger mode.
7162306a36Sopenharmony_ci- input-schmitt-enable: Disable schmitt-trigger mode.
7262306a36Sopenharmony_ci- bias-disable: Disable pin bias.
7362306a36Sopenharmony_ci- bias-pull-down: Pull down on pin.
7462306a36Sopenharmony_ci- bias-pull-up: Pull up on pin.
7562306a36Sopenharmony_ci- input-enable: Enable pin input.
7662306a36Sopenharmony_ci- input-disable: Enable pin output.
7762306a36Sopenharmony_ci- output-high: Set the pin as an output level high.
7862306a36Sopenharmony_ci- output-low: Set the pin as an output level low.
7962306a36Sopenharmony_ci- sleep-hardware-state: Indicate these configs in this state are sleep related.
8062306a36Sopenharmony_ci- sprd,control: Control values referring to databook for global control pins.
8162306a36Sopenharmony_ci- sprd,sleep-mode: Sleep mode selection.
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8362306a36Sopenharmony_ciPlease refer to each sprd,<soc>-pinctrl.txt binding doc for supported values.
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