162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/pinctrl/renesas,rza2-pinctrl.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Renesas RZ/A2 combined Pin and GPIO controller
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Chris Brandt <chris.brandt@renesas.com>
1162306a36Sopenharmony_ci  - Geert Uytterhoeven <geert+renesas@glider.be>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_cidescription:
1462306a36Sopenharmony_ci  The Renesas SoCs of the RZ/A2 series feature a combined Pin and GPIO
1562306a36Sopenharmony_ci  controller.
1662306a36Sopenharmony_ci  Pin multiplexing and GPIO configuration is performed on a per-pin basis.
1762306a36Sopenharmony_ci  Each port features up to 8 pins, each of them configurable for GPIO function
1862306a36Sopenharmony_ci  (port mode) or in alternate function mode.
1962306a36Sopenharmony_ci  Up to 8 different alternate function modes exist for each single pin.
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ciproperties:
2262306a36Sopenharmony_ci  compatible:
2362306a36Sopenharmony_ci    const: "renesas,r7s9210-pinctrl" # RZ/A2M
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ci  reg:
2662306a36Sopenharmony_ci    maxItems: 1
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci  gpio-controller: true
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci  '#gpio-cells':
3162306a36Sopenharmony_ci    const: 2
3262306a36Sopenharmony_ci    description:
3362306a36Sopenharmony_ci      The first cell contains the global GPIO port index, constructed using the
3462306a36Sopenharmony_ci      RZA2_PIN() helper macro in r7s9210-pinctrl.h.
3562306a36Sopenharmony_ci      E.g. "RZA2_PIN(PORT6, 0)" for P6_0.
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci  gpio-ranges:
3862306a36Sopenharmony_ci    maxItems: 1
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ciadditionalProperties:
4162306a36Sopenharmony_ci  type: object
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_ci  allOf:
4462306a36Sopenharmony_ci    - $ref: pincfg-node.yaml#
4562306a36Sopenharmony_ci    - $ref: pinmux-node.yaml#
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci  description:
4862306a36Sopenharmony_ci    The child nodes of the pin controller designate pins to be used for
4962306a36Sopenharmony_ci    specific peripheral functions or as GPIO.
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_ci    A pin multiplexing sub-node describes how to configure a set of
5262306a36Sopenharmony_ci    (or a single) pin in some desired alternate function mode.
5362306a36Sopenharmony_ci    The values for the pinmux properties are a combination of port name,
5462306a36Sopenharmony_ci    pin number and the desired function index. Use the RZA2_PINMUX macro
5562306a36Sopenharmony_ci    located in include/dt-bindings/pinctrl/r7s9210-pinctrl.h to easily
5662306a36Sopenharmony_ci    define these.
5762306a36Sopenharmony_ci    For assigning GPIO pins, use the macro RZA2_PIN also in
5862306a36Sopenharmony_ci    to express the desired port pin.
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ci  properties:
6162306a36Sopenharmony_ci    pinmux:
6262306a36Sopenharmony_ci      description:
6362306a36Sopenharmony_ci        Values are constructed from GPIO port number, pin number, and
6462306a36Sopenharmony_ci        alternate function configuration number using the RZA2_PINMUX()
6562306a36Sopenharmony_ci        helper macro in r7s9210-pinctrl.h.
6662306a36Sopenharmony_ci
6762306a36Sopenharmony_ci  required:
6862306a36Sopenharmony_ci    - pinmux
6962306a36Sopenharmony_ci
7062306a36Sopenharmony_ci  additionalProperties: false
7162306a36Sopenharmony_ci
7262306a36Sopenharmony_ciallOf:
7362306a36Sopenharmony_ci  - $ref: pinctrl.yaml#
7462306a36Sopenharmony_ci
7562306a36Sopenharmony_cirequired:
7662306a36Sopenharmony_ci  - compatible
7762306a36Sopenharmony_ci  - reg
7862306a36Sopenharmony_ci  - gpio-controller
7962306a36Sopenharmony_ci  - '#gpio-cells'
8062306a36Sopenharmony_ci  - gpio-ranges
8162306a36Sopenharmony_ci
8262306a36Sopenharmony_ciexamples:
8362306a36Sopenharmony_ci  - |
8462306a36Sopenharmony_ci    #include <dt-bindings/pinctrl/r7s9210-pinctrl.h>
8562306a36Sopenharmony_ci    pinctrl: pinctrl@fcffe000 {
8662306a36Sopenharmony_ci            compatible = "renesas,r7s9210-pinctrl";
8762306a36Sopenharmony_ci            reg = <0xfcffe000 0x1000>;
8862306a36Sopenharmony_ci
8962306a36Sopenharmony_ci            gpio-controller;
9062306a36Sopenharmony_ci            #gpio-cells = <2>;
9162306a36Sopenharmony_ci            gpio-ranges = <&pinctrl 0 0 176>;
9262306a36Sopenharmony_ci
9362306a36Sopenharmony_ci            /* Serial Console */
9462306a36Sopenharmony_ci            scif4_pins: serial4 {
9562306a36Sopenharmony_ci                    pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */
9662306a36Sopenharmony_ci                             <RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */
9762306a36Sopenharmony_ci            };
9862306a36Sopenharmony_ci    };
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