162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Qualcomm SM8550 SoC LPASS LPI TLMM
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
1162306a36Sopenharmony_ci  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_cidescription:
1462306a36Sopenharmony_ci  Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
1562306a36Sopenharmony_ci  (LPASS) Low Power Island (LPI) of Qualcomm SM8550 SoC.
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ciproperties:
1862306a36Sopenharmony_ci  compatible:
1962306a36Sopenharmony_ci    const: qcom,sm8550-lpass-lpi-pinctrl
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ci  reg:
2262306a36Sopenharmony_ci    items:
2362306a36Sopenharmony_ci      - description: LPASS LPI TLMM Control and Status registers
2462306a36Sopenharmony_ci      - description: LPASS LPI MCC registers
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ci  clocks:
2762306a36Sopenharmony_ci    items:
2862306a36Sopenharmony_ci      - description: LPASS Core voting clock
2962306a36Sopenharmony_ci      - description: LPASS Audio voting clock
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci  clock-names:
3262306a36Sopenharmony_ci    items:
3362306a36Sopenharmony_ci      - const: core
3462306a36Sopenharmony_ci      - const: audio
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci  gpio-controller: true
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ci  "#gpio-cells":
3962306a36Sopenharmony_ci    description: Specifying the pin number and flags, as defined in
4062306a36Sopenharmony_ci      include/dt-bindings/gpio/gpio.h
4162306a36Sopenharmony_ci    const: 2
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_ci  gpio-ranges:
4462306a36Sopenharmony_ci    maxItems: 1
4562306a36Sopenharmony_ci
4662306a36Sopenharmony_cipatternProperties:
4762306a36Sopenharmony_ci  "-state$":
4862306a36Sopenharmony_ci    oneOf:
4962306a36Sopenharmony_ci      - $ref: "#/$defs/qcom-sm8550-lpass-state"
5062306a36Sopenharmony_ci      - patternProperties:
5162306a36Sopenharmony_ci          "-pins$":
5262306a36Sopenharmony_ci            $ref: "#/$defs/qcom-sm8550-lpass-state"
5362306a36Sopenharmony_ci        additionalProperties: false
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci$defs:
5662306a36Sopenharmony_ci  qcom-sm8550-lpass-state:
5762306a36Sopenharmony_ci    type: object
5862306a36Sopenharmony_ci    description:
5962306a36Sopenharmony_ci      Pinctrl node's client devices use subnodes for desired pin configuration.
6062306a36Sopenharmony_ci      Client device subnodes use below standard properties.
6162306a36Sopenharmony_ci    $ref: /schemas/pinctrl/pincfg-node.yaml
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ci    properties:
6462306a36Sopenharmony_ci      pins:
6562306a36Sopenharmony_ci        description:
6662306a36Sopenharmony_ci          List of gpio pins affected by the properties specified in this
6762306a36Sopenharmony_ci          subnode.
6862306a36Sopenharmony_ci        items:
6962306a36Sopenharmony_ci          pattern: "^gpio([0-9]|1[0-9]|2[0-2])$"
7062306a36Sopenharmony_ci
7162306a36Sopenharmony_ci      function:
7262306a36Sopenharmony_ci        enum: [ dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic3_clk,
7362306a36Sopenharmony_ci                dmic3_data, dmic4_clk, dmic4_data, ext_mclk1_a, ext_mclk1_b,
7462306a36Sopenharmony_ci                ext_mclk1_c, ext_mclk1_d, ext_mclk1_e, gpio, i2s0_clk,
7562306a36Sopenharmony_ci                i2s0_data, i2s0_ws, i2s1_clk, i2s1_data, i2s1_ws, i2s2_clk,
7662306a36Sopenharmony_ci                i2s2_data, i2s2_ws, i2s3_clk, i2s3_data, i2s3_ws, i2s4_clk,
7762306a36Sopenharmony_ci                i2s4_data, i2s4_ws, slimbus_clk, slimbus_data, swr_rx_clk,
7862306a36Sopenharmony_ci                swr_rx_data, swr_tx_clk, swr_tx_data, wsa_swr_clk,
7962306a36Sopenharmony_ci                wsa_swr_data, wsa2_swr_clk, wsa2_swr_data ]
8062306a36Sopenharmony_ci        description:
8162306a36Sopenharmony_ci          Specify the alternative function to be configured for the specified
8262306a36Sopenharmony_ci          pins.
8362306a36Sopenharmony_ci
8462306a36Sopenharmony_ci      drive-strength:
8562306a36Sopenharmony_ci        enum: [2, 4, 6, 8, 10, 12, 14, 16]
8662306a36Sopenharmony_ci        default: 2
8762306a36Sopenharmony_ci        description:
8862306a36Sopenharmony_ci          Selects the drive strength for the specified pins, in mA.
8962306a36Sopenharmony_ci
9062306a36Sopenharmony_ci      slew-rate:
9162306a36Sopenharmony_ci        enum: [0, 1, 2, 3]
9262306a36Sopenharmony_ci        default: 0
9362306a36Sopenharmony_ci        description: |
9462306a36Sopenharmony_ci          0: No adjustments
9562306a36Sopenharmony_ci          1: Higher Slew rate (faster edges)
9662306a36Sopenharmony_ci          2: Lower Slew rate (slower edges)
9762306a36Sopenharmony_ci          3: Reserved (No adjustments)
9862306a36Sopenharmony_ci
9962306a36Sopenharmony_ci      bias-bus-hold: true
10062306a36Sopenharmony_ci      bias-pull-down: true
10162306a36Sopenharmony_ci      bias-pull-up: true
10262306a36Sopenharmony_ci      bias-disable: true
10362306a36Sopenharmony_ci      input-enable: true
10462306a36Sopenharmony_ci      output-high: true
10562306a36Sopenharmony_ci      output-low: true
10662306a36Sopenharmony_ci
10762306a36Sopenharmony_ci    required:
10862306a36Sopenharmony_ci      - pins
10962306a36Sopenharmony_ci      - function
11062306a36Sopenharmony_ci
11162306a36Sopenharmony_ci    additionalProperties: false
11262306a36Sopenharmony_ci
11362306a36Sopenharmony_ciallOf:
11462306a36Sopenharmony_ci  - $ref: pinctrl.yaml#
11562306a36Sopenharmony_ci
11662306a36Sopenharmony_cirequired:
11762306a36Sopenharmony_ci  - compatible
11862306a36Sopenharmony_ci  - reg
11962306a36Sopenharmony_ci  - clocks
12062306a36Sopenharmony_ci  - clock-names
12162306a36Sopenharmony_ci  - gpio-controller
12262306a36Sopenharmony_ci  - "#gpio-cells"
12362306a36Sopenharmony_ci  - gpio-ranges
12462306a36Sopenharmony_ci
12562306a36Sopenharmony_ciadditionalProperties: false
12662306a36Sopenharmony_ci
12762306a36Sopenharmony_ciexamples:
12862306a36Sopenharmony_ci  - |
12962306a36Sopenharmony_ci    #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
13062306a36Sopenharmony_ci
13162306a36Sopenharmony_ci    lpass_tlmm: pinctrl@6e80000 {
13262306a36Sopenharmony_ci        compatible = "qcom,sm8550-lpass-lpi-pinctrl";
13362306a36Sopenharmony_ci        reg = <0x06e80000 0x20000>,
13462306a36Sopenharmony_ci              <0x0725a000 0x10000>;
13562306a36Sopenharmony_ci
13662306a36Sopenharmony_ci        clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
13762306a36Sopenharmony_ci                 <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
13862306a36Sopenharmony_ci        clock-names = "core", "audio";
13962306a36Sopenharmony_ci
14062306a36Sopenharmony_ci        gpio-controller;
14162306a36Sopenharmony_ci        #gpio-cells = <2>;
14262306a36Sopenharmony_ci        gpio-ranges = <&lpass_tlmm 0 0 23>;
14362306a36Sopenharmony_ci
14462306a36Sopenharmony_ci        tx-swr-sleep-clk-state {
14562306a36Sopenharmony_ci            pins = "gpio0";
14662306a36Sopenharmony_ci            function = "swr_tx_clk";
14762306a36Sopenharmony_ci            drive-strength = <2>;
14862306a36Sopenharmony_ci            bias-pull-down;
14962306a36Sopenharmony_ci        };
15062306a36Sopenharmony_ci    };
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