162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Qualcomm SC8280XP SoC LPASS LPI TLMM 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: 1362306a36Sopenharmony_ci Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem 1462306a36Sopenharmony_ci (LPASS) Low Power Island (LPI) of Qualcomm SC8280XP SoC. 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ciproperties: 1762306a36Sopenharmony_ci compatible: 1862306a36Sopenharmony_ci const: qcom,sc8280xp-lpass-lpi-pinctrl 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci reg: 2162306a36Sopenharmony_ci items: 2262306a36Sopenharmony_ci - description: LPASS LPI TLMM Control and Status registers 2362306a36Sopenharmony_ci - description: LPASS LPI MCC registers 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci clocks: 2662306a36Sopenharmony_ci items: 2762306a36Sopenharmony_ci - description: LPASS Core voting clock 2862306a36Sopenharmony_ci - description: LPASS Audio voting clock 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci clock-names: 3162306a36Sopenharmony_ci items: 3262306a36Sopenharmony_ci - const: core 3362306a36Sopenharmony_ci - const: audio 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci gpio-controller: true 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci "#gpio-cells": 3862306a36Sopenharmony_ci description: Specifying the pin number and flags, as defined in 3962306a36Sopenharmony_ci include/dt-bindings/gpio/gpio.h 4062306a36Sopenharmony_ci const: 2 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci gpio-ranges: 4362306a36Sopenharmony_ci maxItems: 1 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_cipatternProperties: 4662306a36Sopenharmony_ci "-state$": 4762306a36Sopenharmony_ci oneOf: 4862306a36Sopenharmony_ci - $ref: "#/$defs/qcom-sc8280xp-lpass-state" 4962306a36Sopenharmony_ci - patternProperties: 5062306a36Sopenharmony_ci "-pins$": 5162306a36Sopenharmony_ci $ref: "#/$defs/qcom-sc8280xp-lpass-state" 5262306a36Sopenharmony_ci additionalProperties: false 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci$defs: 5562306a36Sopenharmony_ci qcom-sc8280xp-lpass-state: 5662306a36Sopenharmony_ci type: object 5762306a36Sopenharmony_ci description: 5862306a36Sopenharmony_ci Pinctrl node's client devices use subnodes for desired pin configuration. 5962306a36Sopenharmony_ci Client device subnodes use below standard properties. 6062306a36Sopenharmony_ci $ref: /schemas/pinctrl/pincfg-node.yaml 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci properties: 6362306a36Sopenharmony_ci pins: 6462306a36Sopenharmony_ci description: 6562306a36Sopenharmony_ci List of gpio pins affected by the properties specified in this 6662306a36Sopenharmony_ci subnode. 6762306a36Sopenharmony_ci items: 6862306a36Sopenharmony_ci pattern: "^gpio([0-9]|1[0-8])$" 6962306a36Sopenharmony_ci 7062306a36Sopenharmony_ci function: 7162306a36Sopenharmony_ci enum: [ swr_tx_clk, swr_tx_data, swr_rx_clk, swr_rx_data, 7262306a36Sopenharmony_ci dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic4_clk, 7362306a36Sopenharmony_ci dmic4_data, i2s2_clk, i2s2_ws, dmic3_clk, dmic3_data, 7462306a36Sopenharmony_ci qua_mi2s_sclk, qua_mi2s_ws, qua_mi2s_data, i2s1_clk, i2s1_ws, 7562306a36Sopenharmony_ci i2s1_data, wsa_swr_clk, wsa_swr_data, wsa2_swr_clk, 7662306a36Sopenharmony_ci wsa2_swr_data, i2s2_data, i2s3_clk, i2s3_ws, i2s3_data, 7762306a36Sopenharmony_ci ext_mclk1_c, ext_mclk1_b, ext_mclk1_a ] 7862306a36Sopenharmony_ci description: 7962306a36Sopenharmony_ci Specify the alternative function to be configured for the specified 8062306a36Sopenharmony_ci pins. 8162306a36Sopenharmony_ci 8262306a36Sopenharmony_ci drive-strength: 8362306a36Sopenharmony_ci enum: [2, 4, 6, 8, 10, 12, 14, 16] 8462306a36Sopenharmony_ci default: 2 8562306a36Sopenharmony_ci description: 8662306a36Sopenharmony_ci Selects the drive strength for the specified pins, in mA. 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_ci slew-rate: 8962306a36Sopenharmony_ci enum: [0, 1, 2, 3] 9062306a36Sopenharmony_ci default: 0 9162306a36Sopenharmony_ci description: | 9262306a36Sopenharmony_ci 0: No adjustments 9362306a36Sopenharmony_ci 1: Higher Slew rate (faster edges) 9462306a36Sopenharmony_ci 2: Lower Slew rate (slower edges) 9562306a36Sopenharmony_ci 3: Reserved (No adjustments) 9662306a36Sopenharmony_ci 9762306a36Sopenharmony_ci bias-bus-hold: true 9862306a36Sopenharmony_ci bias-pull-down: true 9962306a36Sopenharmony_ci bias-pull-up: true 10062306a36Sopenharmony_ci bias-disable: true 10162306a36Sopenharmony_ci input-enable: true 10262306a36Sopenharmony_ci output-high: true 10362306a36Sopenharmony_ci output-low: true 10462306a36Sopenharmony_ci 10562306a36Sopenharmony_ci required: 10662306a36Sopenharmony_ci - pins 10762306a36Sopenharmony_ci - function 10862306a36Sopenharmony_ci 10962306a36Sopenharmony_ci additionalProperties: false 11062306a36Sopenharmony_ci 11162306a36Sopenharmony_ciallOf: 11262306a36Sopenharmony_ci - $ref: pinctrl.yaml# 11362306a36Sopenharmony_ci 11462306a36Sopenharmony_cirequired: 11562306a36Sopenharmony_ci - compatible 11662306a36Sopenharmony_ci - reg 11762306a36Sopenharmony_ci - clocks 11862306a36Sopenharmony_ci - clock-names 11962306a36Sopenharmony_ci - gpio-controller 12062306a36Sopenharmony_ci - "#gpio-cells" 12162306a36Sopenharmony_ci - gpio-ranges 12262306a36Sopenharmony_ci 12362306a36Sopenharmony_ciadditionalProperties: false 12462306a36Sopenharmony_ci 12562306a36Sopenharmony_ciexamples: 12662306a36Sopenharmony_ci - | 12762306a36Sopenharmony_ci #include <dt-bindings/sound/qcom,q6afe.h> 12862306a36Sopenharmony_ci pinctrl@33c0000 { 12962306a36Sopenharmony_ci compatible = "qcom,sc8280xp-lpass-lpi-pinctrl"; 13062306a36Sopenharmony_ci reg = <0x33c0000 0x20000>, 13162306a36Sopenharmony_ci <0x3550000 0x10000>; 13262306a36Sopenharmony_ci clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 13362306a36Sopenharmony_ci <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 13462306a36Sopenharmony_ci clock-names = "core", "audio"; 13562306a36Sopenharmony_ci gpio-controller; 13662306a36Sopenharmony_ci #gpio-cells = <2>; 13762306a36Sopenharmony_ci gpio-ranges = <&lpi_tlmm 0 0 19>; 13862306a36Sopenharmony_ci 13962306a36Sopenharmony_ci dmic01-state { 14062306a36Sopenharmony_ci dmic01-clk-pins { 14162306a36Sopenharmony_ci pins = "gpio16"; 14262306a36Sopenharmony_ci function = "dmic1_clk"; 14362306a36Sopenharmony_ci }; 14462306a36Sopenharmony_ci 14562306a36Sopenharmony_ci dmic01-clk-sleep-pins { 14662306a36Sopenharmony_ci pins = "gpio16"; 14762306a36Sopenharmony_ci function = "dmic1_clk"; 14862306a36Sopenharmony_ci }; 14962306a36Sopenharmony_ci }; 15062306a36Sopenharmony_ci 15162306a36Sopenharmony_ci tx-swr-data-sleep-state { 15262306a36Sopenharmony_ci pins = "gpio0", "gpio1"; 15362306a36Sopenharmony_ci function = "swr_tx_data"; 15462306a36Sopenharmony_ci }; 15562306a36Sopenharmony_ci }; 156