162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/pinctrl/pinmux-node.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Generic Pin Multiplexing Node
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Linus Walleij <linus.walleij@linaro.org>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cidescription: |
1362306a36Sopenharmony_ci  The contents of the pin configuration child nodes are defined by the binding
1462306a36Sopenharmony_ci  for the individual pin controller device. The pin configuration nodes need not
1562306a36Sopenharmony_ci  be direct children of the pin controller device; they may be grandchildren,
1662306a36Sopenharmony_ci  for example. Whether this is legal, and whether there is any interaction
1762306a36Sopenharmony_ci  between the child and intermediate parent nodes, is again defined entirely by
1862306a36Sopenharmony_ci  the binding for the individual pin controller device.
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci  While not required to be used, there are 3 generic forms of pin muxing nodes
2162306a36Sopenharmony_ci  which pin controller devices can use.
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci  pin multiplexing nodes:
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ci  Example:
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci  state_0_node_a {
2862306a36Sopenharmony_ci    uart0 {
2962306a36Sopenharmony_ci      function = "uart0";
3062306a36Sopenharmony_ci      groups = "u0rxtx", "u0rtscts";
3162306a36Sopenharmony_ci    };
3262306a36Sopenharmony_ci  };
3362306a36Sopenharmony_ci  state_1_node_a {
3462306a36Sopenharmony_ci    spi {
3562306a36Sopenharmony_ci      function = "spi0";
3662306a36Sopenharmony_ci      groups = "spi0pins";
3762306a36Sopenharmony_ci    };
3862306a36Sopenharmony_ci  };
3962306a36Sopenharmony_ci  state_2_node_a {
4062306a36Sopenharmony_ci    function = "i2c0";
4162306a36Sopenharmony_ci    pins = "mfio29", "mfio30";
4262306a36Sopenharmony_ci  };
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci  Optionally an alternative binding can be used if more suitable depending on the
4562306a36Sopenharmony_ci  pin controller hardware. For hardware where there is a large number of identical
4662306a36Sopenharmony_ci  pin controller instances, naming each pin and function can easily become
4762306a36Sopenharmony_ci  unmaintainable. This is especially the case if the same controller is used for
4862306a36Sopenharmony_ci  different pins and functions depending on the SoC revision and packaging.
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci  For cases like this, the pin controller driver may use pinctrl-pin-array helper
5162306a36Sopenharmony_ci  binding with a hardware based index and a number of pin configuration values:
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_ci  pincontroller {
5462306a36Sopenharmony_ci    ... /* Standard DT properties for the device itself elided */
5562306a36Sopenharmony_ci    #pinctrl-cells = <2>;
5662306a36Sopenharmony_ci
5762306a36Sopenharmony_ci    state_0_node_a {
5862306a36Sopenharmony_ci      pinctrl-pin-array = <
5962306a36Sopenharmony_ci        0 A_DELAY_PS(0) G_DELAY_PS(120)
6062306a36Sopenharmony_ci        4 A_DELAY_PS(0) G_DELAY_PS(360)
6162306a36Sopenharmony_ci        ...
6262306a36Sopenharmony_ci        >;
6362306a36Sopenharmony_ci    };
6462306a36Sopenharmony_ci    ...
6562306a36Sopenharmony_ci  };
6662306a36Sopenharmony_ci
6762306a36Sopenharmony_ci  Above #pinctrl-cells specifies the number of value cells in addition to the
6862306a36Sopenharmony_ci  index of the registers. This is similar to the interrupts-extended binding with
6962306a36Sopenharmony_ci  one exception. There is no need to specify the phandle for each entry as that
7062306a36Sopenharmony_ci  is already known as the defined pins are always children of the pin controller
7162306a36Sopenharmony_ci  node. Further having the phandle pointing to another pin controller would not
7262306a36Sopenharmony_ci  currently work as the pinctrl framework uses named modes to group pins for each
7362306a36Sopenharmony_ci  pin control device.
7462306a36Sopenharmony_ci
7562306a36Sopenharmony_ci  The index for pinctrl-pin-array must relate to the hardware for the pinctrl
7662306a36Sopenharmony_ci  registers, and must not be a virtual index of pin instances. The reason for
7762306a36Sopenharmony_ci  this is to avoid mapping of the index in the dts files and the pin controller
7862306a36Sopenharmony_ci  driver as it can change.
7962306a36Sopenharmony_ci
8062306a36Sopenharmony_ci  For hardware where pin multiplexing configurations have to be specified for
8162306a36Sopenharmony_ci  each single pin the number of required sub-nodes containing "pin" and
8262306a36Sopenharmony_ci  "function" properties can quickly escalate and become hard to write and
8362306a36Sopenharmony_ci  maintain.
8462306a36Sopenharmony_ci
8562306a36Sopenharmony_ci  For cases like this, the pin controller driver may use the pinmux helper
8662306a36Sopenharmony_ci  property, where the pin identifier is provided with mux configuration settings
8762306a36Sopenharmony_ci  in a pinmux group. A pinmux group consists of the pin identifier and mux
8862306a36Sopenharmony_ci  settings represented as a single integer or an array of integers.
8962306a36Sopenharmony_ci
9062306a36Sopenharmony_ci  The pinmux property accepts an array of pinmux groups, each of them describing
9162306a36Sopenharmony_ci  a single pin multiplexing configuration.
9262306a36Sopenharmony_ci
9362306a36Sopenharmony_ci  pincontroller {
9462306a36Sopenharmony_ci    state_0_node_a {
9562306a36Sopenharmony_ci      pinmux = <PINMUX_GROUP>, <PINMUX_GROUP>, ...;
9662306a36Sopenharmony_ci    };
9762306a36Sopenharmony_ci  };
9862306a36Sopenharmony_ci
9962306a36Sopenharmony_ci  Each individual pin controller driver bindings documentation shall specify
10062306a36Sopenharmony_ci  how pin IDs and pin multiplexing configuration are defined and assembled
10162306a36Sopenharmony_ci  together in a pinmux group.
10262306a36Sopenharmony_ci
10362306a36Sopenharmony_ciproperties:
10462306a36Sopenharmony_ci  function:
10562306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/string
10662306a36Sopenharmony_ci    description: The mux function to select
10762306a36Sopenharmony_ci
10862306a36Sopenharmony_ci  pins:
10962306a36Sopenharmony_ci    oneOf:
11062306a36Sopenharmony_ci      - $ref: /schemas/types.yaml#/definitions/uint32-array
11162306a36Sopenharmony_ci      - $ref: /schemas/types.yaml#/definitions/string-array
11262306a36Sopenharmony_ci    description:
11362306a36Sopenharmony_ci      The list of pin identifiers that properties in the node apply to. The
11462306a36Sopenharmony_ci      specific binding for the hardware defines whether the entries are integers
11562306a36Sopenharmony_ci      or strings, and their meaning.
11662306a36Sopenharmony_ci
11762306a36Sopenharmony_ci  groups:
11862306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/string-array
11962306a36Sopenharmony_ci    description:
12062306a36Sopenharmony_ci      the group to apply the properties to, if the driver supports
12162306a36Sopenharmony_ci      configuration of whole groups rather than individual pins (either
12262306a36Sopenharmony_ci      this, "pins" or "pinmux" has to be specified)
12362306a36Sopenharmony_ci
12462306a36Sopenharmony_ci  pinmux:
12562306a36Sopenharmony_ci    description:
12662306a36Sopenharmony_ci      The list of numeric pin ids and their mux settings that properties in the
12762306a36Sopenharmony_ci      node apply to (either this, "pins" or "groups" have to be specified)
12862306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint32-array
12962306a36Sopenharmony_ci
13062306a36Sopenharmony_ci  pinctrl-pin-array:
13162306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint32-array
13262306a36Sopenharmony_ci
13362306a36Sopenharmony_ciadditionalProperties: true
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