162306a36Sopenharmony_ci*ST pin controller.
262306a36Sopenharmony_ci
362306a36Sopenharmony_ciEach multi-function pin is controlled, driven and routed through the
462306a36Sopenharmony_ciPIO multiplexing block. Each pin supports GPIO functionality (ALT0)
562306a36Sopenharmony_ciand multiple alternate functions(ALT1 - ALTx) that directly connect
662306a36Sopenharmony_cithe pin to different hardware blocks.
762306a36Sopenharmony_ci
862306a36Sopenharmony_ciWhen a pin is in GPIO mode, Output Enable (OE), Open Drain(OD), and
962306a36Sopenharmony_ciPull Up (PU) are driven by the related PIO block.
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ciST pinctrl driver controls PIO multiplexing block and also interacts with
1262306a36Sopenharmony_cigpio driver to configure a pin.
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ciGPIO bank can have one of the two possible types of interrupt-wirings.
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ciFirst type is via irqmux, single interrupt is used by multiple gpio banks. This
1762306a36Sopenharmony_cireduces number of overall interrupts numbers required. All these banks belong to
1862306a36Sopenharmony_cia single pincontroller.
1962306a36Sopenharmony_ci		  _________
2062306a36Sopenharmony_ci		 |	   |----> [gpio-bank (n)    ]
2162306a36Sopenharmony_ci		 |	   |----> [gpio-bank (n + 1)]
2262306a36Sopenharmony_ci	[irqN]-- | irq-mux |----> [gpio-bank (n + 2)]
2362306a36Sopenharmony_ci		 |	   |----> [gpio-bank (...  )]
2462306a36Sopenharmony_ci		 |_________|----> [gpio-bank (n + 7)]
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ciSecond type has a dedicated interrupt per gpio bank.
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci	[irqN]----> [gpio-bank (n)]
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ciPin controller node:
3262306a36Sopenharmony_ciRequired properties:
3362306a36Sopenharmony_ci- compatible	: should be "st,stih407-<pio-block>-pinctrl"
3462306a36Sopenharmony_ci- st,syscfg		: Should be a phandle of the syscfg node.
3562306a36Sopenharmony_ci- st,retime-pin-mask	: Should be mask to specify which pins can be retimed.
3662306a36Sopenharmony_ci	If the property is not present, it is assumed that all the pins in the
3762306a36Sopenharmony_ci	bank are capable of retiming. Retiming is mainly used to improve the
3862306a36Sopenharmony_ci	IO timing margins of external synchronous interfaces.
3962306a36Sopenharmony_ci- ranges : defines mapping between pin controller node (parent) to gpio-bank
4062306a36Sopenharmony_ci  node (children).
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ciOptional properties:
4362306a36Sopenharmony_ci- interrupts	: Interrupt number of the irqmux. If the interrupt is shared
4462306a36Sopenharmony_ci  with other gpio banks via irqmux.
4562306a36Sopenharmony_ci  a irqline and gpio banks.
4662306a36Sopenharmony_ci- reg		: irqmux memory resource. If irqmux is present.
4762306a36Sopenharmony_ci- reg-names	: irqmux resource should be named as "irqmux".
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_ciGPIO controller/bank node.
5062306a36Sopenharmony_ciRequired properties:
5162306a36Sopenharmony_ci- gpio-controller : Indicates this device is a GPIO controller
5262306a36Sopenharmony_ci- #gpio-cells	  : Must be two.
5362306a36Sopenharmony_ci     - First cell: specifies the pin number inside the controller
5462306a36Sopenharmony_ci     - Second cell: specifies whether the pin is logically inverted.
5562306a36Sopenharmony_ci       - 0 = active high
5662306a36Sopenharmony_ci       - 1 = active low
5762306a36Sopenharmony_ci- st,bank-name	  : Should be a name string for this bank as specified in
5862306a36Sopenharmony_ci  datasheet.
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ciOptional properties:
6162306a36Sopenharmony_ci- interrupts	: Interrupt number for this gpio bank. If there is a dedicated
6262306a36Sopenharmony_ci  interrupt wired up for this gpio bank.
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_ci- interrupt-controller : Indicates this device is a interrupt controller. GPIO
6562306a36Sopenharmony_ci  bank can be an interrupt controller iff one of the interrupt type either via
6662306a36Sopenharmony_ciirqmux or a dedicated interrupt per bank is specified.
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ci- #interrupt-cells: the value of this property should be 2.
6962306a36Sopenharmony_ci     - First Cell: represents the external gpio interrupt number local to the
7062306a36Sopenharmony_ci       gpio interrupt space of the controller.
7162306a36Sopenharmony_ci     - Second Cell: flags to identify the type of the interrupt
7262306a36Sopenharmony_ci       - 1 = rising edge triggered
7362306a36Sopenharmony_ci       - 2 = falling edge triggered
7462306a36Sopenharmony_ci       - 3 = rising and falling edge triggered
7562306a36Sopenharmony_ci       - 4 = high level triggered
7662306a36Sopenharmony_ci       - 8 = low level triggered
7762306a36Sopenharmony_cifor related macros look in:
7862306a36Sopenharmony_ciinclude/dt-bindings/interrupt-controller/irq.h
7962306a36Sopenharmony_ci
8062306a36Sopenharmony_ciExample:
8162306a36Sopenharmony_ci	pin-controller-sbc {
8262306a36Sopenharmony_ci		#address-cells = <1>;
8362306a36Sopenharmony_ci		#size-cells = <1>;
8462306a36Sopenharmony_ci		compatible = "st,stih407-sbc-pinctrl";
8562306a36Sopenharmony_ci		st,syscfg = <&syscfg_sbc>;
8662306a36Sopenharmony_ci		reg = <0x0961f080 0x4>;
8762306a36Sopenharmony_ci		reg-names = "irqmux";
8862306a36Sopenharmony_ci		interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>;
8962306a36Sopenharmony_ci		interrupt-names = "irqmux";
9062306a36Sopenharmony_ci		ranges = <0 0x09610000 0x6000>;
9162306a36Sopenharmony_ci
9262306a36Sopenharmony_ci		pio0: gpio@9610000 {
9362306a36Sopenharmony_ci			gpio-controller;
9462306a36Sopenharmony_ci			#gpio-cells = <2>;
9562306a36Sopenharmony_ci			interrupt-controller;
9662306a36Sopenharmony_ci			#interrupt-cells = <2>;
9762306a36Sopenharmony_ci			reg = <0x0 0x100>;
9862306a36Sopenharmony_ci			st,bank-name = "PIO0";
9962306a36Sopenharmony_ci		};
10062306a36Sopenharmony_ci		...
10162306a36Sopenharmony_ci		pin-functions nodes follow...
10262306a36Sopenharmony_ci	};
10362306a36Sopenharmony_ci
10462306a36Sopenharmony_ci
10562306a36Sopenharmony_ciContents of function subnode node:
10662306a36Sopenharmony_ci----------------------
10762306a36Sopenharmony_ciRequired properties for pin configuration node:
10862306a36Sopenharmony_ci- st,pins	: Child node with list of pins with configuration.
10962306a36Sopenharmony_ci
11062306a36Sopenharmony_ciBelow is the format of how each pin conf should look like.
11162306a36Sopenharmony_ci
11262306a36Sopenharmony_ci<bank offset mux mode rt_type rt_delay rt_clk>
11362306a36Sopenharmony_ci
11462306a36Sopenharmony_ciEvery PIO is represented with 4-7 parameters depending on retime configuration.
11562306a36Sopenharmony_ciEach parameter is explained as below.
11662306a36Sopenharmony_ci
11762306a36Sopenharmony_ci-bank		: Should be bank phandle to which this PIO belongs.
11862306a36Sopenharmony_ci-offset		: Offset in the PIO bank.
11962306a36Sopenharmony_ci-mux		: Should be alternate function number associated this pin.
12062306a36Sopenharmony_ci		Use same numbers from datasheet.
12162306a36Sopenharmony_ci-mode		:pin configuration is selected from one of the below values.
12262306a36Sopenharmony_ci		IN
12362306a36Sopenharmony_ci		IN_PU
12462306a36Sopenharmony_ci		OUT
12562306a36Sopenharmony_ci		BIDIR
12662306a36Sopenharmony_ci		BIDIR_PU
12762306a36Sopenharmony_ci
12862306a36Sopenharmony_ci-rt_type	Retiming Configuration for the pin.
12962306a36Sopenharmony_ci		Possible retime configuration are:
13062306a36Sopenharmony_ci
13162306a36Sopenharmony_ci		-------		-------------
13262306a36Sopenharmony_ci		value		args
13362306a36Sopenharmony_ci		-------		-------------
13462306a36Sopenharmony_ci		NICLK		<delay> <clk>
13562306a36Sopenharmony_ci		ICLK_IO		<delay> <clk>
13662306a36Sopenharmony_ci		BYPASS		<delay>
13762306a36Sopenharmony_ci		DE_IO		<delay> <clk>
13862306a36Sopenharmony_ci		SE_ICLK_IO	<delay> <clk>
13962306a36Sopenharmony_ci		SE_NICLK_IO	<delay> <clk>
14062306a36Sopenharmony_ci
14162306a36Sopenharmony_ci- delay	is retime delay in pico seconds as mentioned in data sheet.
14262306a36Sopenharmony_ci
14362306a36Sopenharmony_ci- rt_clk	:clk to be use for retime.
14462306a36Sopenharmony_ci		Possible values are:
14562306a36Sopenharmony_ci		CLK_A
14662306a36Sopenharmony_ci		CLK_B
14762306a36Sopenharmony_ci		CLK_C
14862306a36Sopenharmony_ci		CLK_D
14962306a36Sopenharmony_ci
15062306a36Sopenharmony_ciExample of mmcclk pin which is a bi-direction pull pu with retime config
15162306a36Sopenharmony_cias non inverted clock retimed with CLK_B and delay of 0 pico seconds:
15262306a36Sopenharmony_ci
15362306a36Sopenharmony_cipin-controller {
15462306a36Sopenharmony_ci	...
15562306a36Sopenharmony_ci	mmc0 {
15662306a36Sopenharmony_ci		pinctrl_mmc: mmc {
15762306a36Sopenharmony_ci			st,pins {
15862306a36Sopenharmony_ci				mmcclk = <&PIO13 4 ALT4 BIDIR_PU NICLK 0 CLK_B>;
15962306a36Sopenharmony_ci				...
16062306a36Sopenharmony_ci			};
16162306a36Sopenharmony_ci		};
16262306a36Sopenharmony_ci	...
16362306a36Sopenharmony_ci	};
16462306a36Sopenharmony_ci};
16562306a36Sopenharmony_ci
16662306a36Sopenharmony_cisdhci0:sdhci@fe810000{
16762306a36Sopenharmony_ci	...
16862306a36Sopenharmony_ci	interrupt-parent = <&pio3>;
16962306a36Sopenharmony_ci	#interrupt-cells = <2>;
17062306a36Sopenharmony_ci	interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; /* Interrupt line via PIO3-3 */
17162306a36Sopenharmony_ci	interrupt-names = "card-detect";
17262306a36Sopenharmony_ci	pinctrl-names = "default";
17362306a36Sopenharmony_ci	pinctrl-0	= <&pinctrl_mmc>;
17462306a36Sopenharmony_ci};
175