162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/pinctrl/mscc,ocelot-pinctrl.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Microsemi Ocelot pin controller 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Alexandre Belloni <alexandre.belloni@bootlin.com> 1162306a36Sopenharmony_ci - Lars Povlsen <lars.povlsen@microchip.com> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ciproperties: 1462306a36Sopenharmony_ci compatible: 1562306a36Sopenharmony_ci enum: 1662306a36Sopenharmony_ci - microchip,lan966x-pinctrl 1762306a36Sopenharmony_ci - microchip,sparx5-pinctrl 1862306a36Sopenharmony_ci - mscc,jaguar2-pinctrl 1962306a36Sopenharmony_ci - mscc,luton-pinctrl 2062306a36Sopenharmony_ci - mscc,ocelot-pinctrl 2162306a36Sopenharmony_ci - mscc,serval-pinctrl 2262306a36Sopenharmony_ci - mscc,servalt-pinctrl 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci reg: 2562306a36Sopenharmony_ci items: 2662306a36Sopenharmony_ci - description: Base address 2762306a36Sopenharmony_ci - description: Extended pin configuration registers 2862306a36Sopenharmony_ci minItems: 1 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci gpio-controller: true 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci '#gpio-cells': 3362306a36Sopenharmony_ci const: 2 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci gpio-ranges: true 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci interrupts: 3862306a36Sopenharmony_ci maxItems: 1 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ci interrupt-controller: true 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci "#interrupt-cells": 4362306a36Sopenharmony_ci const: 2 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci resets: 4662306a36Sopenharmony_ci maxItems: 1 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci reset-names: 4962306a36Sopenharmony_ci description: Optional shared switch reset. 5062306a36Sopenharmony_ci items: 5162306a36Sopenharmony_ci - const: switch 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_cipatternProperties: 5462306a36Sopenharmony_ci '-pins$': 5562306a36Sopenharmony_ci type: object 5662306a36Sopenharmony_ci allOf: 5762306a36Sopenharmony_ci - $ref: pinmux-node.yaml 5862306a36Sopenharmony_ci - $ref: pincfg-node.yaml 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ci properties: 6162306a36Sopenharmony_ci function: true 6262306a36Sopenharmony_ci pins: true 6362306a36Sopenharmony_ci output-high: true 6462306a36Sopenharmony_ci output-low: true 6562306a36Sopenharmony_ci drive-strength: true 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci required: 6862306a36Sopenharmony_ci - function 6962306a36Sopenharmony_ci - pins 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci additionalProperties: false 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_cirequired: 7462306a36Sopenharmony_ci - compatible 7562306a36Sopenharmony_ci - reg 7662306a36Sopenharmony_ci - gpio-controller 7762306a36Sopenharmony_ci - '#gpio-cells' 7862306a36Sopenharmony_ci - gpio-ranges 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ciallOf: 8162306a36Sopenharmony_ci - $ref: pinctrl.yaml# 8262306a36Sopenharmony_ci - if: 8362306a36Sopenharmony_ci properties: 8462306a36Sopenharmony_ci compatible: 8562306a36Sopenharmony_ci contains: 8662306a36Sopenharmony_ci enum: 8762306a36Sopenharmony_ci - microchip,lan966x-pinctrl 8862306a36Sopenharmony_ci - microchip,sparx5-pinctrl 8962306a36Sopenharmony_ci then: 9062306a36Sopenharmony_ci properties: 9162306a36Sopenharmony_ci reg: 9262306a36Sopenharmony_ci minItems: 2 9362306a36Sopenharmony_ci 9462306a36Sopenharmony_ciadditionalProperties: false 9562306a36Sopenharmony_ci 9662306a36Sopenharmony_ciexamples: 9762306a36Sopenharmony_ci - | 9862306a36Sopenharmony_ci gpio: pinctrl@71070034 { 9962306a36Sopenharmony_ci compatible = "mscc,ocelot-pinctrl"; 10062306a36Sopenharmony_ci reg = <0x71070034 0x28>; 10162306a36Sopenharmony_ci gpio-controller; 10262306a36Sopenharmony_ci #gpio-cells = <2>; 10362306a36Sopenharmony_ci gpio-ranges = <&gpio 0 0 22>; 10462306a36Sopenharmony_ci 10562306a36Sopenharmony_ci uart_pins: uart-pins { 10662306a36Sopenharmony_ci pins = "GPIO_6", "GPIO_7"; 10762306a36Sopenharmony_ci function = "uart"; 10862306a36Sopenharmony_ci }; 10962306a36Sopenharmony_ci 11062306a36Sopenharmony_ci uart2_pins: uart2-pins { 11162306a36Sopenharmony_ci pins = "GPIO_12", "GPIO_13"; 11262306a36Sopenharmony_ci function = "uart2"; 11362306a36Sopenharmony_ci }; 11462306a36Sopenharmony_ci }; 11562306a36Sopenharmony_ci 11662306a36Sopenharmony_ci... 117