162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8192-pinctrl.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: MediaTek MT8192 Pin Controller
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Sean Wang <sean.wang@mediatek.com>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cidescription:
1362306a36Sopenharmony_ci  The MediaTek's MT8192 Pin controller is used to control SoC pins.
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ciproperties:
1662306a36Sopenharmony_ci  compatible:
1762306a36Sopenharmony_ci    const: mediatek,mt8192-pinctrl
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci  gpio-controller: true
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ci  '#gpio-cells':
2262306a36Sopenharmony_ci    description:
2362306a36Sopenharmony_ci      Number of cells in GPIO specifier. Since the generic GPIO binding is used,
2462306a36Sopenharmony_ci      the amount of cells must be specified as 2. See the below mentioned gpio
2562306a36Sopenharmony_ci      binding representation for description of particular cells.
2662306a36Sopenharmony_ci    const: 2
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci  gpio-ranges:
2962306a36Sopenharmony_ci    description: GPIO valid number range.
3062306a36Sopenharmony_ci    maxItems: 1
3162306a36Sopenharmony_ci
3262306a36Sopenharmony_ci  gpio-line-names: true
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_ci  reg:
3562306a36Sopenharmony_ci    description:
3662306a36Sopenharmony_ci      Physical address base for GPIO base registers. There are 11 GPIO physical
3762306a36Sopenharmony_ci      address base in mt8192.
3862306a36Sopenharmony_ci    maxItems: 11
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ci  reg-names:
4162306a36Sopenharmony_ci    description:
4262306a36Sopenharmony_ci      GPIO base register names.
4362306a36Sopenharmony_ci    maxItems: 11
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci  interrupt-controller: true
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci  '#interrupt-cells':
4862306a36Sopenharmony_ci    const: 2
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci  interrupts:
5162306a36Sopenharmony_ci    description: The interrupt outputs to sysirq.
5262306a36Sopenharmony_ci    maxItems: 1
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ci# PIN CONFIGURATION NODES
5562306a36Sopenharmony_cipatternProperties:
5662306a36Sopenharmony_ci  '-pins$':
5762306a36Sopenharmony_ci    type: object
5862306a36Sopenharmony_ci    additionalProperties: false
5962306a36Sopenharmony_ci    patternProperties:
6062306a36Sopenharmony_ci      '^pins':
6162306a36Sopenharmony_ci        type: object
6262306a36Sopenharmony_ci        description:
6362306a36Sopenharmony_ci          A pinctrl node should contain at least one subnodes representing the
6462306a36Sopenharmony_ci          pinctrl groups available on the machine. Each subnode will list the
6562306a36Sopenharmony_ci          pins it needs, and how they should be configured, with regard to muxer
6662306a36Sopenharmony_ci          configuration, pullups, drive strength, input enable/disable and input
6762306a36Sopenharmony_ci          schmitt.
6862306a36Sopenharmony_ci        $ref: pinmux-node.yaml
6962306a36Sopenharmony_ci
7062306a36Sopenharmony_ci        properties:
7162306a36Sopenharmony_ci          pinmux:
7262306a36Sopenharmony_ci            description:
7362306a36Sopenharmony_ci              Integer array, represents gpio pin number and mux setting.
7462306a36Sopenharmony_ci              Supported pin number and mux varies for different SoCs, and are
7562306a36Sopenharmony_ci              defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
7662306a36Sopenharmony_ci
7762306a36Sopenharmony_ci          drive-strength:
7862306a36Sopenharmony_ci            description:
7962306a36Sopenharmony_ci              It can support some arguments, such as MTK_DRIVE_4mA,
8062306a36Sopenharmony_ci              MTK_DRIVE_6mA, etc. See dt-bindings/pinctrl/mt65xx.h. It can only
8162306a36Sopenharmony_ci              support 2/4/6/8/10/12/14/16mA in mt8192.
8262306a36Sopenharmony_ci            enum: [2, 4, 6, 8, 10, 12, 14, 16]
8362306a36Sopenharmony_ci
8462306a36Sopenharmony_ci          drive-strength-microamp:
8562306a36Sopenharmony_ci            enum: [125, 250, 500, 1000]
8662306a36Sopenharmony_ci
8762306a36Sopenharmony_ci          bias-pull-down:
8862306a36Sopenharmony_ci            oneOf:
8962306a36Sopenharmony_ci              - type: boolean
9062306a36Sopenharmony_ci                description: normal pull down.
9162306a36Sopenharmony_ci              - enum: [100, 101, 102, 103]
9262306a36Sopenharmony_ci                description: PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0_
9362306a36Sopenharmony_ci                  defines in dt-bindings/pinctrl/mt65xx.h.
9462306a36Sopenharmony_ci              - enum: [200, 201, 202, 203]
9562306a36Sopenharmony_ci                description: RSEL pull down type. See MTK_PULL_SET_RSEL_ defines
9662306a36Sopenharmony_ci                  in dt-bindings/pinctrl/mt65xx.h.
9762306a36Sopenharmony_ci
9862306a36Sopenharmony_ci          bias-pull-up:
9962306a36Sopenharmony_ci            oneOf:
10062306a36Sopenharmony_ci              - type: boolean
10162306a36Sopenharmony_ci                description: normal pull up.
10262306a36Sopenharmony_ci              - enum: [100, 101, 102, 103]
10362306a36Sopenharmony_ci                description: PUPD/R1/R0 pull up type. See MTK_PUPD_SET_R1R0_
10462306a36Sopenharmony_ci                  defines in dt-bindings/pinctrl/mt65xx.h.
10562306a36Sopenharmony_ci              - enum: [200, 201, 202, 203]
10662306a36Sopenharmony_ci                description: RSEL pull up type. See MTK_PULL_SET_RSEL_ defines
10762306a36Sopenharmony_ci                  in dt-bindings/pinctrl/mt65xx.h.
10862306a36Sopenharmony_ci
10962306a36Sopenharmony_ci          bias-disable: true
11062306a36Sopenharmony_ci
11162306a36Sopenharmony_ci          output-high: true
11262306a36Sopenharmony_ci
11362306a36Sopenharmony_ci          output-low: true
11462306a36Sopenharmony_ci
11562306a36Sopenharmony_ci          input-enable: true
11662306a36Sopenharmony_ci
11762306a36Sopenharmony_ci          input-disable: true
11862306a36Sopenharmony_ci
11962306a36Sopenharmony_ci          input-schmitt-enable: true
12062306a36Sopenharmony_ci
12162306a36Sopenharmony_ci          input-schmitt-disable: true
12262306a36Sopenharmony_ci
12362306a36Sopenharmony_ci        required:
12462306a36Sopenharmony_ci          - pinmux
12562306a36Sopenharmony_ci
12662306a36Sopenharmony_ci        additionalProperties: false
12762306a36Sopenharmony_ci
12862306a36Sopenharmony_ciallOf:
12962306a36Sopenharmony_ci  - $ref: pinctrl.yaml#
13062306a36Sopenharmony_ci
13162306a36Sopenharmony_cirequired:
13262306a36Sopenharmony_ci  - compatible
13362306a36Sopenharmony_ci  - reg
13462306a36Sopenharmony_ci  - interrupts
13562306a36Sopenharmony_ci  - interrupt-controller
13662306a36Sopenharmony_ci  - '#interrupt-cells'
13762306a36Sopenharmony_ci  - gpio-controller
13862306a36Sopenharmony_ci  - '#gpio-cells'
13962306a36Sopenharmony_ci  - gpio-ranges
14062306a36Sopenharmony_ci
14162306a36Sopenharmony_ciadditionalProperties: false
14262306a36Sopenharmony_ci
14362306a36Sopenharmony_ciexamples:
14462306a36Sopenharmony_ci  - |
14562306a36Sopenharmony_ci            #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
14662306a36Sopenharmony_ci            #include <dt-bindings/interrupt-controller/arm-gic.h>
14762306a36Sopenharmony_ci            pio: pinctrl@10005000 {
14862306a36Sopenharmony_ci                    compatible = "mediatek,mt8192-pinctrl";
14962306a36Sopenharmony_ci                    reg = <0x10005000 0x1000>,
15062306a36Sopenharmony_ci                          <0x11c20000 0x1000>,
15162306a36Sopenharmony_ci                          <0x11d10000 0x1000>,
15262306a36Sopenharmony_ci                          <0x11d30000 0x1000>,
15362306a36Sopenharmony_ci                          <0x11d40000 0x1000>,
15462306a36Sopenharmony_ci                          <0x11e20000 0x1000>,
15562306a36Sopenharmony_ci                          <0x11e70000 0x1000>,
15662306a36Sopenharmony_ci                          <0x11ea0000 0x1000>,
15762306a36Sopenharmony_ci                          <0x11f20000 0x1000>,
15862306a36Sopenharmony_ci                          <0x11f30000 0x1000>,
15962306a36Sopenharmony_ci                          <0x1000b000 0x1000>;
16062306a36Sopenharmony_ci                    reg-names = "iocfg0", "iocfg_rm", "iocfg_bm",
16162306a36Sopenharmony_ci                          "iocfg_bl", "iocfg_br", "iocfg_lm",
16262306a36Sopenharmony_ci                          "iocfg_lb", "iocfg_rt", "iocfg_lt",
16362306a36Sopenharmony_ci                          "iocfg_tl", "eint";
16462306a36Sopenharmony_ci                    gpio-controller;
16562306a36Sopenharmony_ci                    #gpio-cells = <2>;
16662306a36Sopenharmony_ci                    gpio-ranges = <&pio 0 0 220>;
16762306a36Sopenharmony_ci                    interrupt-controller;
16862306a36Sopenharmony_ci                    interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 0>;
16962306a36Sopenharmony_ci                    #interrupt-cells = <2>;
17062306a36Sopenharmony_ci
17162306a36Sopenharmony_ci                    spi1-default-pins {
17262306a36Sopenharmony_ci                            pins-cs-mosi-clk {
17362306a36Sopenharmony_ci                                    pinmux = <PINMUX_GPIO157__FUNC_SPI1_A_CSB>,
17462306a36Sopenharmony_ci                                             <PINMUX_GPIO159__FUNC_SPI1_A_MO>,
17562306a36Sopenharmony_ci                                             <PINMUX_GPIO156__FUNC_SPI1_A_CLK>;
17662306a36Sopenharmony_ci                                    bias-disable;
17762306a36Sopenharmony_ci                            };
17862306a36Sopenharmony_ci
17962306a36Sopenharmony_ci                            pins-miso {
18062306a36Sopenharmony_ci                                    pinmux = <PINMUX_GPIO158__FUNC_SPI1_A_MI>;
18162306a36Sopenharmony_ci                                    bias-pull-down;
18262306a36Sopenharmony_ci                            };
18362306a36Sopenharmony_ci                    };
18462306a36Sopenharmony_ci            };
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