162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/pinctrl/mediatek,mt6779-pinctrl.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: MediaTek MT6779 Pin Controller
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Andy Teng <andy.teng@mediatek.com>
1162306a36Sopenharmony_ci  - Sean Wang <sean.wang@kernel.org>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_cidescription:
1462306a36Sopenharmony_ci  The MediaTek pin controller on MT6779 is used to control pin functions, pull
1562306a36Sopenharmony_ci  up/down resistance and drive strength options.
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ciproperties:
1862306a36Sopenharmony_ci  compatible:
1962306a36Sopenharmony_ci    enum:
2062306a36Sopenharmony_ci      - mediatek,mt6779-pinctrl
2162306a36Sopenharmony_ci      - mediatek,mt6797-pinctrl
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci  reg:
2462306a36Sopenharmony_ci    description: Physical addresses for GPIO base(s) and EINT registers.
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ci  reg-names: true
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci  gpio-controller: true
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci  "#gpio-cells":
3162306a36Sopenharmony_ci    const: 2
3262306a36Sopenharmony_ci    description:
3362306a36Sopenharmony_ci      Number of cells in GPIO specifier. Since the generic GPIO binding is used,
3462306a36Sopenharmony_ci      the amount of cells must be specified as 2. See the below mentioned gpio
3562306a36Sopenharmony_ci      binding representation for description of particular cells.
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci  gpio-ranges:
3862306a36Sopenharmony_ci    minItems: 1
3962306a36Sopenharmony_ci    maxItems: 5
4062306a36Sopenharmony_ci    description:
4162306a36Sopenharmony_ci      GPIO valid number range.
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_ci  interrupt-controller: true
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci  interrupts:
4662306a36Sopenharmony_ci    maxItems: 1
4762306a36Sopenharmony_ci    description:
4862306a36Sopenharmony_ci      Specifies the summary IRQ.
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci  "#interrupt-cells":
5162306a36Sopenharmony_ci    const: 2
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_cirequired:
5462306a36Sopenharmony_ci  - compatible
5562306a36Sopenharmony_ci  - reg
5662306a36Sopenharmony_ci  - reg-names
5762306a36Sopenharmony_ci  - gpio-controller
5862306a36Sopenharmony_ci  - "#gpio-cells"
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ciallOf:
6162306a36Sopenharmony_ci  - $ref: pinctrl.yaml#
6262306a36Sopenharmony_ci  - if:
6362306a36Sopenharmony_ci      properties:
6462306a36Sopenharmony_ci        compatible:
6562306a36Sopenharmony_ci          contains:
6662306a36Sopenharmony_ci            const: mediatek,mt6779-pinctrl
6762306a36Sopenharmony_ci    then:
6862306a36Sopenharmony_ci      properties:
6962306a36Sopenharmony_ci        reg:
7062306a36Sopenharmony_ci          minItems: 9
7162306a36Sopenharmony_ci          maxItems: 9
7262306a36Sopenharmony_ci
7362306a36Sopenharmony_ci        reg-names:
7462306a36Sopenharmony_ci          items:
7562306a36Sopenharmony_ci            - const: gpio
7662306a36Sopenharmony_ci            - const: iocfg_rm
7762306a36Sopenharmony_ci            - const: iocfg_br
7862306a36Sopenharmony_ci            - const: iocfg_lm
7962306a36Sopenharmony_ci            - const: iocfg_lb
8062306a36Sopenharmony_ci            - const: iocfg_rt
8162306a36Sopenharmony_ci            - const: iocfg_lt
8262306a36Sopenharmony_ci            - const: iocfg_tl
8362306a36Sopenharmony_ci            - const: eint
8462306a36Sopenharmony_ci  - if:
8562306a36Sopenharmony_ci      properties:
8662306a36Sopenharmony_ci        compatible:
8762306a36Sopenharmony_ci          contains:
8862306a36Sopenharmony_ci            const: mediatek,mt6797-pinctrl
8962306a36Sopenharmony_ci    then:
9062306a36Sopenharmony_ci      properties:
9162306a36Sopenharmony_ci        reg:
9262306a36Sopenharmony_ci          minItems: 5
9362306a36Sopenharmony_ci          maxItems: 5
9462306a36Sopenharmony_ci
9562306a36Sopenharmony_ci        reg-names:
9662306a36Sopenharmony_ci          items:
9762306a36Sopenharmony_ci            - const: gpio
9862306a36Sopenharmony_ci            - const: iocfgl
9962306a36Sopenharmony_ci            - const: iocfgb
10062306a36Sopenharmony_ci            - const: iocfgr
10162306a36Sopenharmony_ci            - const: iocfgt
10262306a36Sopenharmony_ci  - if:
10362306a36Sopenharmony_ci      properties:
10462306a36Sopenharmony_ci        reg-names:
10562306a36Sopenharmony_ci          contains:
10662306a36Sopenharmony_ci            const: eint
10762306a36Sopenharmony_ci    then:
10862306a36Sopenharmony_ci      required:
10962306a36Sopenharmony_ci        - interrupts
11062306a36Sopenharmony_ci        - interrupt-controller
11162306a36Sopenharmony_ci        - "#interrupt-cells"
11262306a36Sopenharmony_ci
11362306a36Sopenharmony_cipatternProperties:
11462306a36Sopenharmony_ci  '-[0-9]*$':
11562306a36Sopenharmony_ci    type: object
11662306a36Sopenharmony_ci    additionalProperties: false
11762306a36Sopenharmony_ci
11862306a36Sopenharmony_ci    patternProperties:
11962306a36Sopenharmony_ci      '-pins*$':
12062306a36Sopenharmony_ci        type: object
12162306a36Sopenharmony_ci        description:
12262306a36Sopenharmony_ci          A pinctrl node should contain at least one subnodes representing the
12362306a36Sopenharmony_ci          pinctrl groups available on the machine. Each subnode will list the
12462306a36Sopenharmony_ci          pins it needs, and how they should be configured, with regard to muxer
12562306a36Sopenharmony_ci          configuration, pullups, drive strength, input enable/disable and input
12662306a36Sopenharmony_ci          schmitt.
12762306a36Sopenharmony_ci        $ref: /schemas/pinctrl/pincfg-node.yaml
12862306a36Sopenharmony_ci
12962306a36Sopenharmony_ci        properties:
13062306a36Sopenharmony_ci          pinmux:
13162306a36Sopenharmony_ci            description:
13262306a36Sopenharmony_ci              Integer array, represents gpio pin number and mux setting.
13362306a36Sopenharmony_ci              Supported pin number and mux varies for different SoCs, and are
13462306a36Sopenharmony_ci              defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
13562306a36Sopenharmony_ci
13662306a36Sopenharmony_ci          bias-disable: true
13762306a36Sopenharmony_ci
13862306a36Sopenharmony_ci          bias-pull-up: true
13962306a36Sopenharmony_ci
14062306a36Sopenharmony_ci          bias-pull-down: true
14162306a36Sopenharmony_ci
14262306a36Sopenharmony_ci          input-enable: true
14362306a36Sopenharmony_ci
14462306a36Sopenharmony_ci          input-disable: true
14562306a36Sopenharmony_ci
14662306a36Sopenharmony_ci          output-low: true
14762306a36Sopenharmony_ci
14862306a36Sopenharmony_ci          output-high: true
14962306a36Sopenharmony_ci
15062306a36Sopenharmony_ci          input-schmitt-enable: true
15162306a36Sopenharmony_ci
15262306a36Sopenharmony_ci          input-schmitt-disable: true
15362306a36Sopenharmony_ci
15462306a36Sopenharmony_ci          drive-strength:
15562306a36Sopenharmony_ci            enum: [2, 4, 8, 12, 16]
15662306a36Sopenharmony_ci
15762306a36Sopenharmony_ci          slew-rate:
15862306a36Sopenharmony_ci            enum: [0, 1]
15962306a36Sopenharmony_ci
16062306a36Sopenharmony_ci          mediatek,pull-up-adv:
16162306a36Sopenharmony_ci            description: |
16262306a36Sopenharmony_ci              Pull up settings for 2 pull resistors, R0 and R1. User can
16362306a36Sopenharmony_ci              configure those special pins. Valid arguments are described as
16462306a36Sopenharmony_ci              below:
16562306a36Sopenharmony_ci              0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
16662306a36Sopenharmony_ci              1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
16762306a36Sopenharmony_ci              2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
16862306a36Sopenharmony_ci              3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
16962306a36Sopenharmony_ci            $ref: /schemas/types.yaml#/definitions/uint32
17062306a36Sopenharmony_ci            enum: [0, 1, 2, 3]
17162306a36Sopenharmony_ci
17262306a36Sopenharmony_ci          mediatek,pull-down-adv:
17362306a36Sopenharmony_ci            description: |
17462306a36Sopenharmony_ci              Pull down settings for 2 pull resistors, R0 and R1. User can
17562306a36Sopenharmony_ci              configure those special pins. Valid arguments are described as
17662306a36Sopenharmony_ci              below:
17762306a36Sopenharmony_ci              0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
17862306a36Sopenharmony_ci              1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
17962306a36Sopenharmony_ci              2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
18062306a36Sopenharmony_ci              3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
18162306a36Sopenharmony_ci            $ref: /schemas/types.yaml#/definitions/uint32
18262306a36Sopenharmony_ci            enum: [0, 1, 2, 3]
18362306a36Sopenharmony_ci
18462306a36Sopenharmony_ci        required:
18562306a36Sopenharmony_ci          - pinmux
18662306a36Sopenharmony_ci
18762306a36Sopenharmony_ci        additionalProperties: false
18862306a36Sopenharmony_ci
18962306a36Sopenharmony_ciadditionalProperties: false
19062306a36Sopenharmony_ci
19162306a36Sopenharmony_ciexamples:
19262306a36Sopenharmony_ci  - |
19362306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/irq.h>
19462306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/arm-gic.h>
19562306a36Sopenharmony_ci    #include <dt-bindings/pinctrl/mt6779-pinfunc.h>
19662306a36Sopenharmony_ci
19762306a36Sopenharmony_ci    soc {
19862306a36Sopenharmony_ci        #address-cells = <2>;
19962306a36Sopenharmony_ci        #size-cells = <2>;
20062306a36Sopenharmony_ci
20162306a36Sopenharmony_ci        pio: pinctrl@10005000 {
20262306a36Sopenharmony_ci            compatible = "mediatek,mt6779-pinctrl";
20362306a36Sopenharmony_ci            reg = <0 0x10005000 0 0x1000>,
20462306a36Sopenharmony_ci                <0 0x11c20000 0 0x1000>,
20562306a36Sopenharmony_ci                <0 0x11d10000 0 0x1000>,
20662306a36Sopenharmony_ci                <0 0x11e20000 0 0x1000>,
20762306a36Sopenharmony_ci                <0 0x11e70000 0 0x1000>,
20862306a36Sopenharmony_ci                <0 0x11ea0000 0 0x1000>,
20962306a36Sopenharmony_ci                <0 0x11f20000 0 0x1000>,
21062306a36Sopenharmony_ci                <0 0x11f30000 0 0x1000>,
21162306a36Sopenharmony_ci                <0 0x1000b000 0 0x1000>;
21262306a36Sopenharmony_ci            reg-names = "gpio", "iocfg_rm",
21362306a36Sopenharmony_ci              "iocfg_br", "iocfg_lm",
21462306a36Sopenharmony_ci              "iocfg_lb", "iocfg_rt",
21562306a36Sopenharmony_ci              "iocfg_lt", "iocfg_tl",
21662306a36Sopenharmony_ci              "eint";
21762306a36Sopenharmony_ci            gpio-controller;
21862306a36Sopenharmony_ci            #gpio-cells = <2>;
21962306a36Sopenharmony_ci            gpio-ranges = <&pio 0 0 210>;
22062306a36Sopenharmony_ci            interrupt-controller;
22162306a36Sopenharmony_ci            #interrupt-cells = <2>;
22262306a36Sopenharmony_ci            interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
22362306a36Sopenharmony_ci
22462306a36Sopenharmony_ci            mmc0_pins_default: mmc0-0 {
22562306a36Sopenharmony_ci                cmd-dat-pins {
22662306a36Sopenharmony_ci                    pinmux = <PINMUX_GPIO168__FUNC_MSDC0_DAT0>,
22762306a36Sopenharmony_ci                        <PINMUX_GPIO172__FUNC_MSDC0_DAT1>,
22862306a36Sopenharmony_ci                        <PINMUX_GPIO169__FUNC_MSDC0_DAT2>,
22962306a36Sopenharmony_ci                        <PINMUX_GPIO177__FUNC_MSDC0_DAT3>,
23062306a36Sopenharmony_ci                        <PINMUX_GPIO170__FUNC_MSDC0_DAT4>,
23162306a36Sopenharmony_ci                        <PINMUX_GPIO173__FUNC_MSDC0_DAT5>,
23262306a36Sopenharmony_ci                        <PINMUX_GPIO171__FUNC_MSDC0_DAT6>,
23362306a36Sopenharmony_ci                        <PINMUX_GPIO174__FUNC_MSDC0_DAT7>,
23462306a36Sopenharmony_ci                        <PINMUX_GPIO167__FUNC_MSDC0_CMD>;
23562306a36Sopenharmony_ci                    input-enable;
23662306a36Sopenharmony_ci                    mediatek,pull-up-adv = <1>;
23762306a36Sopenharmony_ci                };
23862306a36Sopenharmony_ci                clk-pins {
23962306a36Sopenharmony_ci                    pinmux = <PINMUX_GPIO176__FUNC_MSDC0_CLK>;
24062306a36Sopenharmony_ci                    mediatek,pull-down-adv = <2>;
24162306a36Sopenharmony_ci                };
24262306a36Sopenharmony_ci                rst-pins {
24362306a36Sopenharmony_ci                    pinmux = <PINMUX_GPIO178__FUNC_MSDC0_RSTB>;
24462306a36Sopenharmony_ci                    mediatek,pull-up-adv = <0>;
24562306a36Sopenharmony_ci                };
24662306a36Sopenharmony_ci            };
24762306a36Sopenharmony_ci        };
24862306a36Sopenharmony_ci
24962306a36Sopenharmony_ci        mmc0 {
25062306a36Sopenharmony_ci           pinctrl-0 = <&mmc0_pins_default>;
25162306a36Sopenharmony_ci           pinctrl-names = "default";
25262306a36Sopenharmony_ci        };
25362306a36Sopenharmony_ci    };
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