162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/pinctrl/mediatek,mt65xx-pinctrl.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: MediaTek MT65xx Pin Controller
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Sean Wang <sean.wang@kernel.org>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cidescription:
1362306a36Sopenharmony_ci  The MediaTek's MT65xx Pin controller is used to control SoC pins.
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ciproperties:
1662306a36Sopenharmony_ci  compatible:
1762306a36Sopenharmony_ci    enum:
1862306a36Sopenharmony_ci      - mediatek,mt2701-pinctrl
1962306a36Sopenharmony_ci      - mediatek,mt2712-pinctrl
2062306a36Sopenharmony_ci      - mediatek,mt6397-pinctrl
2162306a36Sopenharmony_ci      - mediatek,mt7623-pinctrl
2262306a36Sopenharmony_ci      - mediatek,mt8127-pinctrl
2362306a36Sopenharmony_ci      - mediatek,mt8135-pinctrl
2462306a36Sopenharmony_ci      - mediatek,mt8167-pinctrl
2562306a36Sopenharmony_ci      - mediatek,mt8173-pinctrl
2662306a36Sopenharmony_ci      - mediatek,mt8516-pinctrl
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci  reg:
2962306a36Sopenharmony_ci    maxItems: 1
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci  pins-are-numbered:
3262306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/flag
3362306a36Sopenharmony_ci    description:
3462306a36Sopenharmony_ci      Specify the subnodes are using numbered pinmux to specify pins. (UNUSED)
3562306a36Sopenharmony_ci    deprecated: true
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci  gpio-controller: true
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci  "#gpio-cells":
4062306a36Sopenharmony_ci    const: 2
4162306a36Sopenharmony_ci    description:
4262306a36Sopenharmony_ci      Number of cells in GPIO specifier. Since the generic GPIO binding is used,
4362306a36Sopenharmony_ci      the amount of cells must be specified as 2. See the below mentioned gpio
4462306a36Sopenharmony_ci      binding representation for description of particular cells.
4562306a36Sopenharmony_ci
4662306a36Sopenharmony_ci  mediatek,pctl-regmap:
4762306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/phandle-array
4862306a36Sopenharmony_ci    items:
4962306a36Sopenharmony_ci      maxItems: 1
5062306a36Sopenharmony_ci    minItems: 1
5162306a36Sopenharmony_ci    maxItems: 2
5262306a36Sopenharmony_ci    description:
5362306a36Sopenharmony_ci      Should be phandles of the syscfg node.
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci  interrupt-controller: true
5662306a36Sopenharmony_ci
5762306a36Sopenharmony_ci  interrupts:
5862306a36Sopenharmony_ci    minItems: 1
5962306a36Sopenharmony_ci    maxItems: 3
6062306a36Sopenharmony_ci
6162306a36Sopenharmony_ci  "#interrupt-cells":
6262306a36Sopenharmony_ci    const: 2
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_cirequired:
6562306a36Sopenharmony_ci  - compatible
6662306a36Sopenharmony_ci  - gpio-controller
6762306a36Sopenharmony_ci  - "#gpio-cells"
6862306a36Sopenharmony_ci
6962306a36Sopenharmony_ciallOf:
7062306a36Sopenharmony_ci  - $ref: pinctrl.yaml#
7162306a36Sopenharmony_ci
7262306a36Sopenharmony_cipatternProperties:
7362306a36Sopenharmony_ci  'pins$':
7462306a36Sopenharmony_ci    type: object
7562306a36Sopenharmony_ci    additionalProperties: false
7662306a36Sopenharmony_ci    patternProperties:
7762306a36Sopenharmony_ci      '(^pins|pins?$)':
7862306a36Sopenharmony_ci        type: object
7962306a36Sopenharmony_ci        additionalProperties: false
8062306a36Sopenharmony_ci        description:
8162306a36Sopenharmony_ci          A pinctrl node should contain at least one subnodes representing the
8262306a36Sopenharmony_ci          pinctrl groups available on the machine. Each subnode will list the
8362306a36Sopenharmony_ci          pins it needs, and how they should be configured, with regard to muxer
8462306a36Sopenharmony_ci          configuration, pullups, drive strength, input enable/disable and input
8562306a36Sopenharmony_ci          schmitt.
8662306a36Sopenharmony_ci        $ref: /schemas/pinctrl/pincfg-node.yaml
8762306a36Sopenharmony_ci
8862306a36Sopenharmony_ci        properties:
8962306a36Sopenharmony_ci          pinmux:
9062306a36Sopenharmony_ci            description:
9162306a36Sopenharmony_ci              Integer array, represents gpio pin number and mux setting.
9262306a36Sopenharmony_ci              Supported pin number and mux varies for different SoCs, and are
9362306a36Sopenharmony_ci              defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
9462306a36Sopenharmony_ci
9562306a36Sopenharmony_ci          bias-disable: true
9662306a36Sopenharmony_ci
9762306a36Sopenharmony_ci          bias-pull-up:
9862306a36Sopenharmony_ci            description:
9962306a36Sopenharmony_ci              Besides generic pinconfig options, it can be used as the pull up
10062306a36Sopenharmony_ci              settings for 2 pull resistors, R0 and R1. User can configure those
10162306a36Sopenharmony_ci              special pins. Some macros have been defined for this usage, such
10262306a36Sopenharmony_ci              as MTK_PUPD_SET_R1R0_00. See dt-bindings/pinctrl/mt65xx.h for
10362306a36Sopenharmony_ci              valid arguments.
10462306a36Sopenharmony_ci
10562306a36Sopenharmony_ci          bias-pull-down: true
10662306a36Sopenharmony_ci
10762306a36Sopenharmony_ci          input-enable: true
10862306a36Sopenharmony_ci
10962306a36Sopenharmony_ci          input-disable: true
11062306a36Sopenharmony_ci
11162306a36Sopenharmony_ci          output-low: true
11262306a36Sopenharmony_ci
11362306a36Sopenharmony_ci          output-high: true
11462306a36Sopenharmony_ci
11562306a36Sopenharmony_ci          input-schmitt-enable: true
11662306a36Sopenharmony_ci
11762306a36Sopenharmony_ci          input-schmitt-disable: true
11862306a36Sopenharmony_ci
11962306a36Sopenharmony_ci          drive-strength:
12062306a36Sopenharmony_ci            description:
12162306a36Sopenharmony_ci              Can support some arguments, such as MTK_DRIVE_4mA, MTK_DRIVE_6mA,
12262306a36Sopenharmony_ci              etc. See dt-bindings/pinctrl/mt65xx.h for valid arguments.
12362306a36Sopenharmony_ci
12462306a36Sopenharmony_ci        required:
12562306a36Sopenharmony_ci          - pinmux
12662306a36Sopenharmony_ci
12762306a36Sopenharmony_ciadditionalProperties: false
12862306a36Sopenharmony_ci
12962306a36Sopenharmony_ciexamples:
13062306a36Sopenharmony_ci  - |
13162306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/irq.h>
13262306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/arm-gic.h>
13362306a36Sopenharmony_ci    #include <dt-bindings/pinctrl/mt8135-pinfunc.h>
13462306a36Sopenharmony_ci
13562306a36Sopenharmony_ci    soc {
13662306a36Sopenharmony_ci        #address-cells = <2>;
13762306a36Sopenharmony_ci        #size-cells = <2>;
13862306a36Sopenharmony_ci
13962306a36Sopenharmony_ci        syscfg_pctl_a: syscfg-pctl-a@10005000 {
14062306a36Sopenharmony_ci          compatible = "mediatek,mt8135-pctl-a-syscfg", "syscon";
14162306a36Sopenharmony_ci          reg = <0 0x10005000 0 0x1000>;
14262306a36Sopenharmony_ci        };
14362306a36Sopenharmony_ci
14462306a36Sopenharmony_ci        syscfg_pctl_b: syscfg-pctl-b@1020c020 {
14562306a36Sopenharmony_ci          compatible = "mediatek,mt8135-pctl-b-syscfg", "syscon";
14662306a36Sopenharmony_ci          reg = <0 0x1020C020 0 0x1000>;
14762306a36Sopenharmony_ci        };
14862306a36Sopenharmony_ci
14962306a36Sopenharmony_ci        pinctrl@1c20800 {
15062306a36Sopenharmony_ci          compatible = "mediatek,mt8135-pinctrl";
15162306a36Sopenharmony_ci          reg = <0 0x1000B000 0 0x1000>;
15262306a36Sopenharmony_ci          mediatek,pctl-regmap = <&syscfg_pctl_a>, <&syscfg_pctl_b>;
15362306a36Sopenharmony_ci          gpio-controller;
15462306a36Sopenharmony_ci          #gpio-cells = <2>;
15562306a36Sopenharmony_ci          interrupt-controller;
15662306a36Sopenharmony_ci          #interrupt-cells = <2>;
15762306a36Sopenharmony_ci          interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
15862306a36Sopenharmony_ci              <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
15962306a36Sopenharmony_ci              <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
16062306a36Sopenharmony_ci
16162306a36Sopenharmony_ci          i2c0_pins_a: i2c0-pins {
16262306a36Sopenharmony_ci            pins1 {
16362306a36Sopenharmony_ci              pinmux = <MT8135_PIN_100_SDA0__FUNC_SDA0>,
16462306a36Sopenharmony_ci                <MT8135_PIN_101_SCL0__FUNC_SCL0>;
16562306a36Sopenharmony_ci              bias-disable;
16662306a36Sopenharmony_ci            };
16762306a36Sopenharmony_ci          };
16862306a36Sopenharmony_ci
16962306a36Sopenharmony_ci          i2c1_pins_a: i2c1-pins {
17062306a36Sopenharmony_ci            pins {
17162306a36Sopenharmony_ci              pinmux = <MT8135_PIN_195_SDA1__FUNC_SDA1>,
17262306a36Sopenharmony_ci                <MT8135_PIN_196_SCL1__FUNC_SCL1>;
17362306a36Sopenharmony_ci              bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
17462306a36Sopenharmony_ci            };
17562306a36Sopenharmony_ci          };
17662306a36Sopenharmony_ci
17762306a36Sopenharmony_ci          i2c2_pins_a: i2c2-pins {
17862306a36Sopenharmony_ci            pins1 {
17962306a36Sopenharmony_ci              pinmux = <MT8135_PIN_193_SDA2__FUNC_SDA2>;
18062306a36Sopenharmony_ci              bias-pull-down;
18162306a36Sopenharmony_ci            };
18262306a36Sopenharmony_ci
18362306a36Sopenharmony_ci            pins2 {
18462306a36Sopenharmony_ci              pinmux = <MT8135_PIN_49_WATCHDOG__FUNC_GPIO49>;
18562306a36Sopenharmony_ci              bias-pull-up;
18662306a36Sopenharmony_ci            };
18762306a36Sopenharmony_ci          };
18862306a36Sopenharmony_ci
18962306a36Sopenharmony_ci          i2c3_pins_a: i2c3-pins {
19062306a36Sopenharmony_ci            pins1 {
19162306a36Sopenharmony_ci              pinmux = <MT8135_PIN_40_DAC_CLK__FUNC_GPIO40>,
19262306a36Sopenharmony_ci                <MT8135_PIN_41_DAC_WS__FUNC_GPIO41>;
19362306a36Sopenharmony_ci              bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
19462306a36Sopenharmony_ci            };
19562306a36Sopenharmony_ci
19662306a36Sopenharmony_ci            pins2 {
19762306a36Sopenharmony_ci              pinmux = <MT8135_PIN_35_SCL3__FUNC_SCL3>,
19862306a36Sopenharmony_ci                <MT8135_PIN_36_SDA3__FUNC_SDA3>;
19962306a36Sopenharmony_ci              output-low;
20062306a36Sopenharmony_ci              bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
20162306a36Sopenharmony_ci            };
20262306a36Sopenharmony_ci
20362306a36Sopenharmony_ci            pins3 {
20462306a36Sopenharmony_ci              pinmux = <MT8135_PIN_57_JTCK__FUNC_GPIO57>,
20562306a36Sopenharmony_ci                <MT8135_PIN_60_JTDI__FUNC_JTDI>;
20662306a36Sopenharmony_ci              drive-strength = <32>;
20762306a36Sopenharmony_ci            };
20862306a36Sopenharmony_ci          };
20962306a36Sopenharmony_ci        };
21062306a36Sopenharmony_ci    };
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