162306a36Sopenharmony_ci* Freescale IMX27 IOMUX Controller 262306a36Sopenharmony_ci 362306a36Sopenharmony_ciRequired properties: 462306a36Sopenharmony_ci- compatible: "fsl,imx27-iomuxc" 562306a36Sopenharmony_ci 662306a36Sopenharmony_ciThe iomuxc driver node should define subnodes containing of pinctrl configuration subnodes. 762306a36Sopenharmony_ci 862306a36Sopenharmony_ciRequired properties for pin configuration node: 962306a36Sopenharmony_ci- fsl,pins: three integers array, represents a group of pins mux and config 1062306a36Sopenharmony_ci setting. The format is fsl,pins = <PIN MUX_ID CONFIG>. 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci PIN is an integer between 0 and 0xbf. imx27 has 6 ports with 32 configurable 1362306a36Sopenharmony_ci configurable pins each. PIN is PORT * 32 + PORT_PIN, PORT_PIN is the pin 1462306a36Sopenharmony_ci number on the specific port (between 0 and 31). 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci MUX_ID is 1762306a36Sopenharmony_ci function + (direction << 2) + (gpio_oconf << 4) + (gpio_iconfa << 8) + (gpio_iconfb << 10) 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci function value is used to select the pin function. 2062306a36Sopenharmony_ci Possible values: 2162306a36Sopenharmony_ci 0 - Primary function 2262306a36Sopenharmony_ci 1 - Alternate function 2362306a36Sopenharmony_ci 2 - GPIO 2462306a36Sopenharmony_ci Registers: GIUS (GPIO In Use), GPR (General Purpose Register) 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci direction defines the data direction of the pin. 2762306a36Sopenharmony_ci Possible values: 2862306a36Sopenharmony_ci 0 - Input 2962306a36Sopenharmony_ci 1 - Output 3062306a36Sopenharmony_ci Register: DDIR 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci gpio_oconf configures the gpio submodule output signal. This does not 3362306a36Sopenharmony_ci have any effect unless GPIO function is selected. A/B/C_IN are output 3462306a36Sopenharmony_ci signals of function blocks A,B and C. Specific function blocks are 3562306a36Sopenharmony_ci described in the reference manual. 3662306a36Sopenharmony_ci Possible values: 3762306a36Sopenharmony_ci 0 - A_IN 3862306a36Sopenharmony_ci 1 - B_IN 3962306a36Sopenharmony_ci 2 - C_IN 4062306a36Sopenharmony_ci 3 - Data Register 4162306a36Sopenharmony_ci Registers: OCR1, OCR2 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci gpio_iconfa/b configures the gpio submodule input to functionblocks A and 4462306a36Sopenharmony_ci B. GPIO function should be selected if this is configured. 4562306a36Sopenharmony_ci Possible values: 4662306a36Sopenharmony_ci 0 - GPIO_IN 4762306a36Sopenharmony_ci 1 - Interrupt Status Register 4862306a36Sopenharmony_ci 2 - Pulldown 4962306a36Sopenharmony_ci 3 - Pullup 5062306a36Sopenharmony_ci Registers ICONFA1, ICONFA2, ICONFB1 and ICONFB2 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci CONFIG can be 0 or 1, meaning Pullup disable/enable. 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ciThe iomux controller has gpio child nodes which are embedded in the iomux 5662306a36Sopenharmony_cicontrol registers. They have to be defined as child nodes of the iomux device 5762306a36Sopenharmony_cinode. If gpio subnodes are defined "#address-cells", "#size-cells" and "ranges" 5862306a36Sopenharmony_ciproperties for the iomux device node are required. 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ciExample: 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ciiomuxc: iomuxc@10015000 { 6362306a36Sopenharmony_ci compatible = "fsl,imx27-iomuxc"; 6462306a36Sopenharmony_ci reg = <0x10015000 0x600>; 6562306a36Sopenharmony_ci #address-cells = <1>; 6662306a36Sopenharmony_ci #size-cells = <1>; 6762306a36Sopenharmony_ci ranges; 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_ci gpio1: gpio@10015000 { 7062306a36Sopenharmony_ci ... 7162306a36Sopenharmony_ci }; 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_ci ... 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_ci uart { 7662306a36Sopenharmony_ci pinctrl_uart1: uart-1 { 7762306a36Sopenharmony_ci fsl,pins = < 7862306a36Sopenharmony_ci 0x8c 0x004 0x0 /* UART1_TXD__UART1_TXD */ 7962306a36Sopenharmony_ci 0x8d 0x000 0x0 /* UART1_RXD__UART1_RXD */ 8062306a36Sopenharmony_ci 0x8e 0x004 0x0 /* UART1_CTS__UART1_CTS */ 8162306a36Sopenharmony_ci 0x8f 0x000 0x0 /* UART1_RTS__UART1_RTS */ 8262306a36Sopenharmony_ci >; 8362306a36Sopenharmony_ci }; 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_ci ... 8662306a36Sopenharmony_ci }; 8762306a36Sopenharmony_ci}; 8862306a36Sopenharmony_ci 8962306a36Sopenharmony_ci 9062306a36Sopenharmony_ciFor convenience there are macros defined in imx27-pinfunc.h which provide PIN 9162306a36Sopenharmony_ciand MUX_ID. They are structured as MX27_PAD_<Pad name>__<Signal name>. The names 9262306a36Sopenharmony_ciare defined in the i.MX27 reference manual. 9362306a36Sopenharmony_ci 9462306a36Sopenharmony_ciThe above example using macros: 9562306a36Sopenharmony_ci 9662306a36Sopenharmony_ciiomuxc: iomuxc@10015000 { 9762306a36Sopenharmony_ci compatible = "fsl,imx27-iomuxc"; 9862306a36Sopenharmony_ci reg = <0x10015000 0x600>; 9962306a36Sopenharmony_ci #address-cells = <1>; 10062306a36Sopenharmony_ci #size-cells = <1>; 10162306a36Sopenharmony_ci ranges; 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_ci gpio1: gpio@10015000 { 10462306a36Sopenharmony_ci ... 10562306a36Sopenharmony_ci }; 10662306a36Sopenharmony_ci 10762306a36Sopenharmony_ci ... 10862306a36Sopenharmony_ci 10962306a36Sopenharmony_ci uart { 11062306a36Sopenharmony_ci pinctrl_uart1: uart-1 { 11162306a36Sopenharmony_ci fsl,pins = < 11262306a36Sopenharmony_ci MX27_PAD_UART1_TXD__UART1_TXD 0x0 11362306a36Sopenharmony_ci MX27_PAD_UART1_RXD__UART1_RXD 0x0 11462306a36Sopenharmony_ci MX27_PAD_UART1_CTS__UART1_CTS 0x0 11562306a36Sopenharmony_ci MX27_PAD_UART1_RTS__UART1_RTS 0x0 11662306a36Sopenharmony_ci >; 11762306a36Sopenharmony_ci }; 11862306a36Sopenharmony_ci 11962306a36Sopenharmony_ci ... 12062306a36Sopenharmony_ci }; 12162306a36Sopenharmony_ci}; 122