162306a36Sopenharmony_ciBroadcom Northstar plus (NSP) GPIO/PINCONF Controller 262306a36Sopenharmony_ci 362306a36Sopenharmony_ciRequired properties: 462306a36Sopenharmony_ci- compatible: 562306a36Sopenharmony_ci Must be "brcm,nsp-gpio-a" 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci- reg: 862306a36Sopenharmony_ci Should contain the register physical address and length for each of 962306a36Sopenharmony_ci GPIO base, IO control registers 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci- #gpio-cells: 1262306a36Sopenharmony_ci Must be two. The first cell is the GPIO pin number (within the 1362306a36Sopenharmony_ci controller's pin space) and the second cell is used for the following: 1462306a36Sopenharmony_ci bit[0]: polarity (0 for active high and 1 for active low) 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci- gpio-controller: 1762306a36Sopenharmony_ci Specifies that the node is a GPIO controller 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci- ngpios: 2062306a36Sopenharmony_ci Number of gpios supported (58x25 supports 32 and 58x23 supports 24) 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ciOptional properties: 2362306a36Sopenharmony_ci- interrupts: 2462306a36Sopenharmony_ci Interrupt ID 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci- interrupt-controller: 2762306a36Sopenharmony_ci Specifies that the node is an interrupt controller 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci- gpio-ranges: 3062306a36Sopenharmony_ci Specifies the mapping between gpio controller and pin-controllers pins. 3162306a36Sopenharmony_ci This requires 4 fields in cells defined as - 3262306a36Sopenharmony_ci 1. Phandle of pin-controller. 3362306a36Sopenharmony_ci 2. GPIO base pin offset. 3462306a36Sopenharmony_ci 3 Pin-control base pin offset. 3562306a36Sopenharmony_ci 4. number of gpio pins which are linearly mapped from pin base. 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ciSupported generic PINCONF properties in child nodes: 3862306a36Sopenharmony_ci- pins: 3962306a36Sopenharmony_ci The list of pins (within the controller's own pin space) that properties 4062306a36Sopenharmony_ci in the node apply to. Pin names are "gpio-<pin>" 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci- bias-disable: 4362306a36Sopenharmony_ci Disable pin bias 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci- bias-pull-up: 4662306a36Sopenharmony_ci Enable internal pull up resistor 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci- bias-pull-down: 4962306a36Sopenharmony_ci Enable internal pull down resistor 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ci- drive-strength: 5262306a36Sopenharmony_ci Valid drive strength values include 2, 4, 6, 8, 10, 12, 14, 16 (mA) 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ciExample: 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci gpioa: gpio@18000020 { 5762306a36Sopenharmony_ci compatible = "brcm,nsp-gpio-a"; 5862306a36Sopenharmony_ci reg = <0x18000020 0x100>, 5962306a36Sopenharmony_ci <0x1803f1c4 0x1c>; 6062306a36Sopenharmony_ci #gpio-cells = <2>; 6162306a36Sopenharmony_ci gpio-controller; 6262306a36Sopenharmony_ci ngpios = <32>; 6362306a36Sopenharmony_ci gpio-ranges = <&pinctrl 0 0 31>; 6462306a36Sopenharmony_ci interrupt-controller; 6562306a36Sopenharmony_ci interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci /* Hog a few default settings */ 6862306a36Sopenharmony_ci pinctrl-names = "default"; 6962306a36Sopenharmony_ci pinctrl-0 = <&led>; 7062306a36Sopenharmony_ci led: led { 7162306a36Sopenharmony_ci pins = "gpio-1"; 7262306a36Sopenharmony_ci bias-pull-up; 7362306a36Sopenharmony_ci }; 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_ci pwr: pwr { 7662306a36Sopenharmony_ci gpio-hog; 7762306a36Sopenharmony_ci gpios = <3 1>; 7862306a36Sopenharmony_ci output-high; 7962306a36Sopenharmony_ci }; 8062306a36Sopenharmony_ci }; 81