162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 262306a36Sopenharmony_ci# Copyright 2023 Realtek Semiconductor Corporation 362306a36Sopenharmony_ci%YAML 1.2 462306a36Sopenharmony_ci--- 562306a36Sopenharmony_ci$id: http://devicetree.org/schemas/phy/realtek,usb3phy.yaml# 662306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 762306a36Sopenharmony_ci 862306a36Sopenharmony_cititle: Realtek DHC SoCs USB 3.0 PHY 962306a36Sopenharmony_ci 1062306a36Sopenharmony_cimaintainers: 1162306a36Sopenharmony_ci - Stanley Chang <stanley_chang@realtek.com> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_cidescription: | 1462306a36Sopenharmony_ci Realtek USB 3.0 PHY support the digital home center (DHC) RTD series SoCs. 1562306a36Sopenharmony_ci The USB 3.0 PHY driver is designed to support the XHCI controller. The SoCs 1662306a36Sopenharmony_ci support multiple XHCI controllers. One PHY device node maps to one XHCI 1762306a36Sopenharmony_ci controller. 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci RTD1295/RTD1619 SoCs USB 2062306a36Sopenharmony_ci The USB architecture includes three XHCI controllers. 2162306a36Sopenharmony_ci Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some 2262306a36Sopenharmony_ci controllers. 2362306a36Sopenharmony_ci XHCI controller#0 -- usb2phy -- phy#0 2462306a36Sopenharmony_ci |- usb3phy -- phy#0 2562306a36Sopenharmony_ci XHCI controller#1 -- usb2phy -- phy#0 2662306a36Sopenharmony_ci XHCI controller#2 -- usb2phy -- phy#0 2762306a36Sopenharmony_ci |- usb3phy -- phy#0 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci RTD1319/RTD1619b SoCs USB 3062306a36Sopenharmony_ci The USB architecture includes three XHCI controllers. 3162306a36Sopenharmony_ci Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2. 3262306a36Sopenharmony_ci XHCI controller#0 -- usb2phy -- phy#0 3362306a36Sopenharmony_ci XHCI controller#1 -- usb2phy -- phy#0 3462306a36Sopenharmony_ci XHCI controller#2 -- usb2phy -- phy#0 3562306a36Sopenharmony_ci |- usb3phy -- phy#0 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci RTD1319d SoCs USB 3862306a36Sopenharmony_ci The USB architecture includes three XHCI controllers. 3962306a36Sopenharmony_ci Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0. 4062306a36Sopenharmony_ci XHCI controller#0 -- usb2phy -- phy#0 4162306a36Sopenharmony_ci |- usb3phy -- phy#0 4262306a36Sopenharmony_ci XHCI controller#1 -- usb2phy -- phy#0 4362306a36Sopenharmony_ci XHCI controller#2 -- usb2phy -- phy#0 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ciproperties: 4662306a36Sopenharmony_ci compatible: 4762306a36Sopenharmony_ci enum: 4862306a36Sopenharmony_ci - realtek,rtd1295-usb3phy 4962306a36Sopenharmony_ci - realtek,rtd1319-usb3phy 5062306a36Sopenharmony_ci - realtek,rtd1319d-usb3phy 5162306a36Sopenharmony_ci - realtek,rtd1619-usb3phy 5262306a36Sopenharmony_ci - realtek,rtd1619b-usb3phy 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci reg: 5562306a36Sopenharmony_ci maxItems: 1 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_ci "#phy-cells": 5862306a36Sopenharmony_ci const: 0 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ci nvmem-cells: 6162306a36Sopenharmony_ci maxItems: 1 6262306a36Sopenharmony_ci description: A phandle to the tx lfps swing trim data provided by 6362306a36Sopenharmony_ci a nvmem device, if unspecified, default values shall be used. 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci nvmem-cell-names: 6662306a36Sopenharmony_ci items: 6762306a36Sopenharmony_ci - const: usb_u3_tx_lfps_swing_trim 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_ci realtek,amplitude-control-coarse-tuning: 7062306a36Sopenharmony_ci description: 7162306a36Sopenharmony_ci This adjusts the signal amplitude for normal operation and beacon LFPS. 7262306a36Sopenharmony_ci This value is a parameter for coarse tuning. 7362306a36Sopenharmony_ci For different boards, if the default value is inappropriate, this 7462306a36Sopenharmony_ci property can be assigned to adjust. 7562306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32 7662306a36Sopenharmony_ci default: 255 7762306a36Sopenharmony_ci minimum: 0 7862306a36Sopenharmony_ci maximum: 255 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci realtek,amplitude-control-fine-tuning: 8162306a36Sopenharmony_ci description: 8262306a36Sopenharmony_ci This adjusts the signal amplitude for normal operation and beacon LFPS. 8362306a36Sopenharmony_ci This value is used for fine-tuning parameters. 8462306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32 8562306a36Sopenharmony_ci default: 65535 8662306a36Sopenharmony_ci minimum: 0 8762306a36Sopenharmony_ci maximum: 65535 8862306a36Sopenharmony_ci 8962306a36Sopenharmony_cirequired: 9062306a36Sopenharmony_ci - compatible 9162306a36Sopenharmony_ci - reg 9262306a36Sopenharmony_ci - "#phy-cells" 9362306a36Sopenharmony_ci 9462306a36Sopenharmony_ciadditionalProperties: false 9562306a36Sopenharmony_ci 9662306a36Sopenharmony_ciexamples: 9762306a36Sopenharmony_ci - | 9862306a36Sopenharmony_ci usb-phy@13e10 { 9962306a36Sopenharmony_ci compatible = "realtek,rtd1319d-usb3phy"; 10062306a36Sopenharmony_ci reg = <0x13e10 0x4>; 10162306a36Sopenharmony_ci #phy-cells = <0>; 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_ci nvmem-cells = <&otp_usb_u3_tx_lfps_swing_trim>; 10462306a36Sopenharmony_ci nvmem-cell-names = "usb_u3_tx_lfps_swing_trim"; 10562306a36Sopenharmony_ci 10662306a36Sopenharmony_ci realtek,amplitude-control-coarse-tuning = <0x77>; 10762306a36Sopenharmony_ci }; 108