162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Intel Lightning Mountain(LGM) eMMC PHY
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cidescription: |+
1362306a36Sopenharmony_ci  Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon
1462306a36Sopenharmony_ci  node is used to reference the base address of eMMC phy registers.
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ci  The eMMC PHY node should be the child of a syscon node with the
1762306a36Sopenharmony_ci  required property:
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci  - compatible:         Should be one of the following:
2062306a36Sopenharmony_ci                        "intel,lgm-syscon", "syscon"
2162306a36Sopenharmony_ci  - reg:
2262306a36Sopenharmony_ci      maxItems: 1
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ciproperties:
2562306a36Sopenharmony_ci  compatible:
2662306a36Sopenharmony_ci    enum:
2762306a36Sopenharmony_ci      - intel,lgm-emmc-phy
2862306a36Sopenharmony_ci      - intel,keembay-emmc-phy
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci  "#phy-cells":
3162306a36Sopenharmony_ci    const: 0
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ci  reg:
3462306a36Sopenharmony_ci    maxItems: 1
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci  clocks:
3762306a36Sopenharmony_ci    maxItems: 1
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci  clock-names:
4062306a36Sopenharmony_ci    items:
4162306a36Sopenharmony_ci      - const: emmcclk
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_cirequired:
4462306a36Sopenharmony_ci  - "#phy-cells"
4562306a36Sopenharmony_ci  - compatible
4662306a36Sopenharmony_ci  - reg
4762306a36Sopenharmony_ci  - clocks
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_ciadditionalProperties: false
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_ciexamples:
5262306a36Sopenharmony_ci  - |
5362306a36Sopenharmony_ci    sysconf: chiptop@e0200000 {
5462306a36Sopenharmony_ci      compatible = "intel,lgm-syscon", "syscon";
5562306a36Sopenharmony_ci      reg = <0xe0200000 0x100>;
5662306a36Sopenharmony_ci      #address-cells = <1>;
5762306a36Sopenharmony_ci      #size-cells = <1>;
5862306a36Sopenharmony_ci
5962306a36Sopenharmony_ci      emmc_phy: emmc-phy@a8 {
6062306a36Sopenharmony_ci        compatible = "intel,lgm-emmc-phy";
6162306a36Sopenharmony_ci        reg = <0x00a8 0x10>;
6262306a36Sopenharmony_ci        clocks = <&emmc>;
6362306a36Sopenharmony_ci        #phy-cells = <0>;
6462306a36Sopenharmony_ci      };
6562306a36Sopenharmony_ci    };
6662306a36Sopenharmony_ci
6762306a36Sopenharmony_ci  - |
6862306a36Sopenharmony_ci    phy@20290000 {
6962306a36Sopenharmony_ci          compatible = "intel,keembay-emmc-phy";
7062306a36Sopenharmony_ci          reg = <0x20290000 0x54>;
7162306a36Sopenharmony_ci          clocks = <&emmc>;
7262306a36Sopenharmony_ci          clock-names = "emmcclk";
7362306a36Sopenharmony_ci          #phy-cells = <0>;
7462306a36Sopenharmony_ci    };
7562306a36Sopenharmony_ci...
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