162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/phy/intel,combo-phy.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Intel ComboPhy Subsystem
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Dilip Kota <eswara.kota@linux.intel.com>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cidescription: |
1362306a36Sopenharmony_ci  Intel Combophy subsystem supports PHYs for PCIe, EMAC and SATA
1462306a36Sopenharmony_ci  controllers. A single Combophy provides two PHY instances.
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ciproperties:
1762306a36Sopenharmony_ci  $nodename:
1862306a36Sopenharmony_ci    pattern: "combophy(@.*|-([0-9]|[1-9][0-9]+))?$"
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci  compatible:
2162306a36Sopenharmony_ci    items:
2262306a36Sopenharmony_ci      - const: intel,combophy-lgm
2362306a36Sopenharmony_ci      - const: intel,combo-phy
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ci  clocks:
2662306a36Sopenharmony_ci    maxItems: 1
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci  reg:
2962306a36Sopenharmony_ci    items:
3062306a36Sopenharmony_ci      - description: ComboPhy core registers
3162306a36Sopenharmony_ci      - description: PCIe app core control registers
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ci  reg-names:
3462306a36Sopenharmony_ci    items:
3562306a36Sopenharmony_ci      - const: core
3662306a36Sopenharmony_ci      - const: app
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ci  resets:
3962306a36Sopenharmony_ci    maxItems: 4
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_ci  reset-names:
4262306a36Sopenharmony_ci    items:
4362306a36Sopenharmony_ci      - const: phy
4462306a36Sopenharmony_ci      - const: core
4562306a36Sopenharmony_ci      - const: iphy0
4662306a36Sopenharmony_ci      - const: iphy1
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci  intel,syscfg:
4962306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/phandle-array
5062306a36Sopenharmony_ci    items:
5162306a36Sopenharmony_ci      - items:
5262306a36Sopenharmony_ci          - description: phandle to Chip configuration registers
5362306a36Sopenharmony_ci          - description: ComboPhy instance id
5462306a36Sopenharmony_ci    description: Chip configuration registers handle and ComboPhy instance id
5562306a36Sopenharmony_ci
5662306a36Sopenharmony_ci  intel,hsio:
5762306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/phandle-array
5862306a36Sopenharmony_ci    items:
5962306a36Sopenharmony_ci      - items:
6062306a36Sopenharmony_ci          - description: phandle to HSIO registers
6162306a36Sopenharmony_ci          - description: ComboPhy instance id
6262306a36Sopenharmony_ci    description: HSIO registers handle and ComboPhy instance id on NOC
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_ci  intel,aggregation:
6562306a36Sopenharmony_ci    type: boolean
6662306a36Sopenharmony_ci    description: |
6762306a36Sopenharmony_ci      Specify the flag to configure ComboPHY in dual lane mode.
6862306a36Sopenharmony_ci
6962306a36Sopenharmony_ci  intel,phy-mode:
7062306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint32
7162306a36Sopenharmony_ci    description: |
7262306a36Sopenharmony_ci      Mode of the two phys in ComboPhy.
7362306a36Sopenharmony_ci      See dt-bindings/phy/phy.h for values.
7462306a36Sopenharmony_ci
7562306a36Sopenharmony_ci  "#phy-cells":
7662306a36Sopenharmony_ci    const: 1
7762306a36Sopenharmony_ci
7862306a36Sopenharmony_cirequired:
7962306a36Sopenharmony_ci  - compatible
8062306a36Sopenharmony_ci  - clocks
8162306a36Sopenharmony_ci  - reg
8262306a36Sopenharmony_ci  - reg-names
8362306a36Sopenharmony_ci  - intel,syscfg
8462306a36Sopenharmony_ci  - intel,hsio
8562306a36Sopenharmony_ci  - intel,phy-mode
8662306a36Sopenharmony_ci  - "#phy-cells"
8762306a36Sopenharmony_ci
8862306a36Sopenharmony_ciadditionalProperties: false
8962306a36Sopenharmony_ci
9062306a36Sopenharmony_ciexamples:
9162306a36Sopenharmony_ci  - |
9262306a36Sopenharmony_ci    #include <dt-bindings/phy/phy.h>
9362306a36Sopenharmony_ci    combophy@d0a00000 {
9462306a36Sopenharmony_ci        compatible = "intel,combophy-lgm", "intel,combo-phy";
9562306a36Sopenharmony_ci        clocks = <&cgu0 1>;
9662306a36Sopenharmony_ci        #phy-cells = <1>;
9762306a36Sopenharmony_ci        reg = <0xd0a00000 0x40000>,
9862306a36Sopenharmony_ci              <0xd0a40000 0x1000>;
9962306a36Sopenharmony_ci        reg-names = "core", "app";
10062306a36Sopenharmony_ci        resets = <&rcu0 0x50 6>,
10162306a36Sopenharmony_ci                 <&rcu0 0x50 17>,
10262306a36Sopenharmony_ci                 <&rcu0 0x50 23>,
10362306a36Sopenharmony_ci                 <&rcu0 0x50 24>;
10462306a36Sopenharmony_ci        reset-names = "phy", "core", "iphy0", "iphy1";
10562306a36Sopenharmony_ci        intel,syscfg = <&sysconf 0>;
10662306a36Sopenharmony_ci        intel,hsio = <&hsiol 0>;
10762306a36Sopenharmony_ci        intel,phy-mode = <PHY_TYPE_PCIE>;
10862306a36Sopenharmony_ci        intel,aggregation;
10962306a36Sopenharmony_ci    };
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