162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/pci/samsung,exynos-pcie.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Samsung SoC series PCIe Host Controller
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Marek Szyprowski <m.szyprowski@samsung.com>
1162306a36Sopenharmony_ci  - Jaehoon Chung <jh80.chung@samsung.com>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_cidescription: |+
1462306a36Sopenharmony_ci  Exynos5433 SoC PCIe host controller is based on the Synopsys DesignWare
1562306a36Sopenharmony_ci  PCIe IP and thus inherits all the common properties defined in
1662306a36Sopenharmony_ci  snps,dw-pcie.yaml.
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ciallOf:
1962306a36Sopenharmony_ci  - $ref: /schemas/pci/snps,dw-pcie.yaml#
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ciproperties:
2262306a36Sopenharmony_ci  compatible:
2362306a36Sopenharmony_ci    const: samsung,exynos5433-pcie
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ci  reg:
2662306a36Sopenharmony_ci    items:
2762306a36Sopenharmony_ci      - description: Data Bus Interface (DBI) registers.
2862306a36Sopenharmony_ci      - description: External Local Bus interface (ELBI) registers.
2962306a36Sopenharmony_ci      - description: PCIe configuration space region.
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci  reg-names:
3262306a36Sopenharmony_ci    items:
3362306a36Sopenharmony_ci      - const: dbi
3462306a36Sopenharmony_ci      - const: elbi
3562306a36Sopenharmony_ci      - const: config
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci  interrupts:
3862306a36Sopenharmony_ci    maxItems: 1
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ci  clocks:
4162306a36Sopenharmony_ci    items:
4262306a36Sopenharmony_ci      - description: PCIe bridge clock
4362306a36Sopenharmony_ci      - description: PCIe bus clock
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci  clock-names:
4662306a36Sopenharmony_ci    items:
4762306a36Sopenharmony_ci      - const: pcie
4862306a36Sopenharmony_ci      - const: pcie_bus
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci  phys:
5162306a36Sopenharmony_ci    maxItems: 1
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_ci  vdd10-supply:
5462306a36Sopenharmony_ci    description:
5562306a36Sopenharmony_ci      Phandle to a regulator that provides 1.0V power to the PCIe block.
5662306a36Sopenharmony_ci
5762306a36Sopenharmony_ci  vdd18-supply:
5862306a36Sopenharmony_ci    description:
5962306a36Sopenharmony_ci      Phandle to a regulator that provides 1.8V power to the PCIe block.
6062306a36Sopenharmony_ci
6162306a36Sopenharmony_ci  num-lanes:
6262306a36Sopenharmony_ci    const: 1
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_ci  num-viewport:
6562306a36Sopenharmony_ci    const: 3
6662306a36Sopenharmony_ci
6762306a36Sopenharmony_cirequired:
6862306a36Sopenharmony_ci  - reg
6962306a36Sopenharmony_ci  - reg-names
7062306a36Sopenharmony_ci  - interrupts
7162306a36Sopenharmony_ci  - "#address-cells"
7262306a36Sopenharmony_ci  - "#size-cells"
7362306a36Sopenharmony_ci  - "#interrupt-cells"
7462306a36Sopenharmony_ci  - interrupt-map
7562306a36Sopenharmony_ci  - interrupt-map-mask
7662306a36Sopenharmony_ci  - ranges
7762306a36Sopenharmony_ci  - bus-range
7862306a36Sopenharmony_ci  - device_type
7962306a36Sopenharmony_ci  - num-lanes
8062306a36Sopenharmony_ci  - num-viewport
8162306a36Sopenharmony_ci  - clocks
8262306a36Sopenharmony_ci  - clock-names
8362306a36Sopenharmony_ci  - phys
8462306a36Sopenharmony_ci  - vdd10-supply
8562306a36Sopenharmony_ci  - vdd18-supply
8662306a36Sopenharmony_ci
8762306a36Sopenharmony_ciunevaluatedProperties: false
8862306a36Sopenharmony_ci
8962306a36Sopenharmony_ciexamples:
9062306a36Sopenharmony_ci  - |
9162306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/irq.h>
9262306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/arm-gic.h>
9362306a36Sopenharmony_ci    #include <dt-bindings/clock/exynos5433.h>
9462306a36Sopenharmony_ci
9562306a36Sopenharmony_ci    pcie: pcie@15700000 {
9662306a36Sopenharmony_ci        compatible = "samsung,exynos5433-pcie";
9762306a36Sopenharmony_ci        reg = <0x15700000 0x1000>, <0x156b0000 0x1000>, <0x0c000000 0x1000>;
9862306a36Sopenharmony_ci        reg-names = "dbi", "elbi", "config";
9962306a36Sopenharmony_ci        #address-cells = <3>;
10062306a36Sopenharmony_ci        #size-cells = <2>;
10162306a36Sopenharmony_ci        #interrupt-cells = <1>;
10262306a36Sopenharmony_ci        device_type = "pci";
10362306a36Sopenharmony_ci        interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
10462306a36Sopenharmony_ci        clocks = <&cmu_fsys CLK_PCIE>, <&cmu_fsys CLK_PCLK_PCIE_PHY>;
10562306a36Sopenharmony_ci        clock-names = "pcie", "pcie_bus";
10662306a36Sopenharmony_ci        phys = <&pcie_phy>;
10762306a36Sopenharmony_ci        pinctrl-0 = <&pcie_bus &pcie_wlanen>;
10862306a36Sopenharmony_ci        pinctrl-names = "default";
10962306a36Sopenharmony_ci        num-lanes = <1>;
11062306a36Sopenharmony_ci        num-viewport = <3>;
11162306a36Sopenharmony_ci        bus-range = <0x00 0xff>;
11262306a36Sopenharmony_ci        ranges = <0x81000000 0 0	  0x0c001000 0 0x00010000>,
11362306a36Sopenharmony_ci                 <0x82000000 0 0x0c011000 0x0c011000 0 0x03feefff>;
11462306a36Sopenharmony_ci        vdd10-supply = <&ldo6_reg>;
11562306a36Sopenharmony_ci        vdd18-supply = <&ldo7_reg>;
11662306a36Sopenharmony_ci        interrupt-map-mask = <0 0 0 0>;
11762306a36Sopenharmony_ci        interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
11862306a36Sopenharmony_ci    };
11962306a36Sopenharmony_ci...
120