162306a36Sopenharmony_ci* Mediatek/Ralink RT3883 PCI controller 262306a36Sopenharmony_ci 362306a36Sopenharmony_ci1) Main node 462306a36Sopenharmony_ci 562306a36Sopenharmony_ci Required properties: 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci - compatible: must be "ralink,rt3883-pci" 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci - reg: specifies the physical base address of the controller and 1062306a36Sopenharmony_ci the length of the memory mapped region. 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci - #address-cells: specifies the number of cells needed to encode an 1362306a36Sopenharmony_ci address. The value must be 1. 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci - #size-cells: specifies the number of cells used to represent the size 1662306a36Sopenharmony_ci of an address. The value must be 1. 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci - ranges: specifies the translation between child address space and parent 1962306a36Sopenharmony_ci address space 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci Optional properties: 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci - status: indicates the operational status of the device. 2462306a36Sopenharmony_ci Value must be either "disabled" or "okay". 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci2) Child nodes 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci The main node must have two child nodes which describes the built-in 2962306a36Sopenharmony_ci interrupt controller and the PCI host bridge. 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci a) Interrupt controller: 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci Required properties: 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci - interrupt-controller: identifies the node as an interrupt controller 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci - #address-cells: specifies the number of cells needed to encode an 3862306a36Sopenharmony_ci address. The value must be 0. As such, 'interrupt-map' nodes do not 3962306a36Sopenharmony_ci have to specify a parent unit address. 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci - #interrupt-cells: specifies the number of cells needed to encode an 4262306a36Sopenharmony_ci interrupt source. The value must be 1. 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_ci - interrupts: specifies the interrupt source of the parent interrupt 4562306a36Sopenharmony_ci controller. The format of the interrupt specifier depends on the 4662306a36Sopenharmony_ci parent interrupt controller. 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci b) PCI host bridge: 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci Required properties: 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci - #address-cells: specifies the number of cells needed to encode an 5362306a36Sopenharmony_ci address. The value must be 0. 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci - #size-cells: specifies the number of cells used to represent the size 5662306a36Sopenharmony_ci of an address. The value must be 2. 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci - #interrupt-cells: specifies the number of cells needed to encode an 5962306a36Sopenharmony_ci interrupt source. The value must be 1. 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_ci - device_type: must be "pci" 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci - bus-range: PCI bus numbers covered 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci - ranges: specifies the ranges for the PCI memory and I/O regions 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci - interrupt-map-mask, 6862306a36Sopenharmony_ci - interrupt-map: standard PCI properties to define the mapping of the 6962306a36Sopenharmony_ci PCI interface to interrupt numbers. 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci The PCI host bridge node might have additional sub-nodes representing 7262306a36Sopenharmony_ci the onboard PCI devices/PCI slots. Each such sub-node must have the 7362306a36Sopenharmony_ci following mandatory properties: 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_ci - reg: used only for interrupt mapping, so only the first four bytes 7662306a36Sopenharmony_ci are used to refer to the correct bus number and device number. 7762306a36Sopenharmony_ci 7862306a36Sopenharmony_ci - device_type: must be "pci" 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci If a given sub-node represents a PCI bridge it must have following 8162306a36Sopenharmony_ci mandatory properties as well: 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci - #address-cells: must be set to <3> 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_ci - #size-cells: must set to <2> 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_ci - #interrupt-cells: must be set to <1> 8862306a36Sopenharmony_ci 8962306a36Sopenharmony_ci - interrupt-map-mask, 9062306a36Sopenharmony_ci - interrupt-map: standard PCI properties to define the mapping of the 9162306a36Sopenharmony_ci PCI interface to interrupt numbers. 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_ci Besides the required properties the sub-nodes may have these optional 9462306a36Sopenharmony_ci properties: 9562306a36Sopenharmony_ci 9662306a36Sopenharmony_ci - status: indicates the operational status of the sub-node. 9762306a36Sopenharmony_ci Value must be either "disabled" or "okay". 9862306a36Sopenharmony_ci 9962306a36Sopenharmony_ci3) Example: 10062306a36Sopenharmony_ci 10162306a36Sopenharmony_ci a) SoC specific dtsi file: 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_ci pci@10140000 { 10462306a36Sopenharmony_ci compatible = "ralink,rt3883-pci"; 10562306a36Sopenharmony_ci reg = <0x10140000 0x20000>; 10662306a36Sopenharmony_ci #address-cells = <1>; 10762306a36Sopenharmony_ci #size-cells = <1>; 10862306a36Sopenharmony_ci ranges; /* direct mapping */ 10962306a36Sopenharmony_ci 11062306a36Sopenharmony_ci status = "disabled"; 11162306a36Sopenharmony_ci 11262306a36Sopenharmony_ci pciintc: interrupt-controller { 11362306a36Sopenharmony_ci interrupt-controller; 11462306a36Sopenharmony_ci #address-cells = <0>; 11562306a36Sopenharmony_ci #interrupt-cells = <1>; 11662306a36Sopenharmony_ci 11762306a36Sopenharmony_ci interrupt-parent = <&cpuintc>; 11862306a36Sopenharmony_ci interrupts = <4>; 11962306a36Sopenharmony_ci }; 12062306a36Sopenharmony_ci 12162306a36Sopenharmony_ci host-bridge { 12262306a36Sopenharmony_ci #address-cells = <3>; 12362306a36Sopenharmony_ci #size-cells = <2>; 12462306a36Sopenharmony_ci #interrupt-cells = <1>; 12562306a36Sopenharmony_ci 12662306a36Sopenharmony_ci device_type = "pci"; 12762306a36Sopenharmony_ci 12862306a36Sopenharmony_ci bus-range = <0 255>; 12962306a36Sopenharmony_ci ranges = < 13062306a36Sopenharmony_ci 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */ 13162306a36Sopenharmony_ci 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */ 13262306a36Sopenharmony_ci >; 13362306a36Sopenharmony_ci 13462306a36Sopenharmony_ci interrupt-map-mask = <0xf800 0 0 7>; 13562306a36Sopenharmony_ci interrupt-map = < 13662306a36Sopenharmony_ci /* IDSEL 17 */ 13762306a36Sopenharmony_ci 0x8800 0 0 1 &pciintc 18 13862306a36Sopenharmony_ci 0x8800 0 0 2 &pciintc 18 13962306a36Sopenharmony_ci 0x8800 0 0 3 &pciintc 18 14062306a36Sopenharmony_ci 0x8800 0 0 4 &pciintc 18 14162306a36Sopenharmony_ci /* IDSEL 18 */ 14262306a36Sopenharmony_ci 0x9000 0 0 1 &pciintc 19 14362306a36Sopenharmony_ci 0x9000 0 0 2 &pciintc 19 14462306a36Sopenharmony_ci 0x9000 0 0 3 &pciintc 19 14562306a36Sopenharmony_ci 0x9000 0 0 4 &pciintc 19 14662306a36Sopenharmony_ci >; 14762306a36Sopenharmony_ci 14862306a36Sopenharmony_ci pci-bridge@1 { 14962306a36Sopenharmony_ci reg = <0x0800 0 0 0 0>; 15062306a36Sopenharmony_ci device_type = "pci"; 15162306a36Sopenharmony_ci #interrupt-cells = <1>; 15262306a36Sopenharmony_ci #address-cells = <3>; 15362306a36Sopenharmony_ci #size-cells = <2>; 15462306a36Sopenharmony_ci 15562306a36Sopenharmony_ci interrupt-map-mask = <0x0 0 0 0>; 15662306a36Sopenharmony_ci interrupt-map = <0x0 0 0 0 &pciintc 20>; 15762306a36Sopenharmony_ci 15862306a36Sopenharmony_ci status = "disabled"; 15962306a36Sopenharmony_ci }; 16062306a36Sopenharmony_ci 16162306a36Sopenharmony_ci pci-slot@17 { 16262306a36Sopenharmony_ci reg = <0x8800 0 0 0 0>; 16362306a36Sopenharmony_ci device_type = "pci"; 16462306a36Sopenharmony_ci 16562306a36Sopenharmony_ci status = "disabled"; 16662306a36Sopenharmony_ci }; 16762306a36Sopenharmony_ci 16862306a36Sopenharmony_ci pci-slot@18 { 16962306a36Sopenharmony_ci reg = <0x9000 0 0 0 0>; 17062306a36Sopenharmony_ci device_type = "pci"; 17162306a36Sopenharmony_ci 17262306a36Sopenharmony_ci status = "disabled"; 17362306a36Sopenharmony_ci }; 17462306a36Sopenharmony_ci }; 17562306a36Sopenharmony_ci }; 17662306a36Sopenharmony_ci 17762306a36Sopenharmony_ci b) Board specific dts file: 17862306a36Sopenharmony_ci 17962306a36Sopenharmony_ci pci@10140000 { 18062306a36Sopenharmony_ci status = "okay"; 18162306a36Sopenharmony_ci 18262306a36Sopenharmony_ci host-bridge { 18362306a36Sopenharmony_ci pci-bridge@1 { 18462306a36Sopenharmony_ci status = "okay"; 18562306a36Sopenharmony_ci }; 18662306a36Sopenharmony_ci }; 18762306a36Sopenharmony_ci }; 188