162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/pci/intel-gw-pcie.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: PCIe RC controller on Intel Gateway SoCs
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Rahul Tanwar <rtanwar@maxlinear.com>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ciselect:
1362306a36Sopenharmony_ci  properties:
1462306a36Sopenharmony_ci    compatible:
1562306a36Sopenharmony_ci      contains:
1662306a36Sopenharmony_ci        const: intel,lgm-pcie
1762306a36Sopenharmony_ci  required:
1862306a36Sopenharmony_ci    - compatible
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ciallOf:
2162306a36Sopenharmony_ci  - $ref: /schemas/pci/snps,dw-pcie.yaml#
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ciproperties:
2462306a36Sopenharmony_ci  compatible:
2562306a36Sopenharmony_ci    items:
2662306a36Sopenharmony_ci      - const: intel,lgm-pcie
2762306a36Sopenharmony_ci      - const: snps,dw-pcie
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ci  reg:
3062306a36Sopenharmony_ci    items:
3162306a36Sopenharmony_ci      - description: Controller control and status registers.
3262306a36Sopenharmony_ci      - description: PCIe configuration registers.
3362306a36Sopenharmony_ci      - description: Controller application registers.
3462306a36Sopenharmony_ci
3562306a36Sopenharmony_ci  reg-names:
3662306a36Sopenharmony_ci    items:
3762306a36Sopenharmony_ci      - const: dbi
3862306a36Sopenharmony_ci      - const: config
3962306a36Sopenharmony_ci      - const: app
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_ci  ranges:
4262306a36Sopenharmony_ci    maxItems: 1
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci  resets:
4562306a36Sopenharmony_ci    maxItems: 1
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci  clocks:
4862306a36Sopenharmony_ci    maxItems: 1
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci  phys:
5162306a36Sopenharmony_ci    maxItems: 1
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_ci  phy-names:
5462306a36Sopenharmony_ci    const: pcie
5562306a36Sopenharmony_ci
5662306a36Sopenharmony_ci  reset-gpios:
5762306a36Sopenharmony_ci    maxItems: 1
5862306a36Sopenharmony_ci
5962306a36Sopenharmony_ci  num-lanes:
6062306a36Sopenharmony_ci    maximum: 2
6162306a36Sopenharmony_ci
6262306a36Sopenharmony_ci  max-link-speed:
6362306a36Sopenharmony_ci    enum: [1, 2, 3, 4]
6462306a36Sopenharmony_ci    default: 1
6562306a36Sopenharmony_ci
6662306a36Sopenharmony_ci  reset-assert-ms:
6762306a36Sopenharmony_ci    description: |
6862306a36Sopenharmony_ci      Delay after asserting reset to the PCIe device.
6962306a36Sopenharmony_ci    maximum: 500
7062306a36Sopenharmony_ci    default: 100
7162306a36Sopenharmony_ci
7262306a36Sopenharmony_cirequired:
7362306a36Sopenharmony_ci  - compatible
7462306a36Sopenharmony_ci  - reg
7562306a36Sopenharmony_ci  - reg-names
7662306a36Sopenharmony_ci  - ranges
7762306a36Sopenharmony_ci  - resets
7862306a36Sopenharmony_ci  - clocks
7962306a36Sopenharmony_ci  - phys
8062306a36Sopenharmony_ci  - phy-names
8162306a36Sopenharmony_ci  - reset-gpios
8262306a36Sopenharmony_ci  - '#interrupt-cells'
8362306a36Sopenharmony_ci  - interrupt-map
8462306a36Sopenharmony_ci  - interrupt-map-mask
8562306a36Sopenharmony_ci
8662306a36Sopenharmony_ciunevaluatedProperties: false
8762306a36Sopenharmony_ci
8862306a36Sopenharmony_ciexamples:
8962306a36Sopenharmony_ci  - |
9062306a36Sopenharmony_ci    #include <dt-bindings/gpio/gpio.h>
9162306a36Sopenharmony_ci    pcie10: pcie@d0e00000 {
9262306a36Sopenharmony_ci      compatible = "intel,lgm-pcie", "snps,dw-pcie";
9362306a36Sopenharmony_ci      device_type = "pci";
9462306a36Sopenharmony_ci      #address-cells = <3>;
9562306a36Sopenharmony_ci      #size-cells = <2>;
9662306a36Sopenharmony_ci      reg = <0xd0e00000 0x1000>,
9762306a36Sopenharmony_ci            <0xd2000000 0x800000>,
9862306a36Sopenharmony_ci            <0xd0a41000 0x1000>;
9962306a36Sopenharmony_ci      reg-names = "dbi", "config", "app";
10062306a36Sopenharmony_ci      linux,pci-domain = <0>;
10162306a36Sopenharmony_ci      max-link-speed = <4>;
10262306a36Sopenharmony_ci      bus-range = <0x00 0x08>;
10362306a36Sopenharmony_ci      #interrupt-cells = <1>;
10462306a36Sopenharmony_ci      interrupt-map-mask = <0 0 0 0x7>;
10562306a36Sopenharmony_ci      interrupt-map = <0 0 0 1 &ioapic1 27 1>,
10662306a36Sopenharmony_ci                      <0 0 0 2 &ioapic1 28 1>,
10762306a36Sopenharmony_ci                      <0 0 0 3 &ioapic1 29 1>,
10862306a36Sopenharmony_ci                      <0 0 0 4 &ioapic1 30 1>;
10962306a36Sopenharmony_ci      ranges = <0x02000000 0 0xd4000000 0xd4000000 0 0x04000000>;
11062306a36Sopenharmony_ci      resets = <&rcu0 0x50 0>;
11162306a36Sopenharmony_ci      clocks = <&cgu0 120>;
11262306a36Sopenharmony_ci      phys = <&cb0phy0>;
11362306a36Sopenharmony_ci      phy-names = "pcie";
11462306a36Sopenharmony_ci      reset-assert-ms = <500>;
11562306a36Sopenharmony_ci      reset-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
11662306a36Sopenharmony_ci      num-lanes = <2>;
11762306a36Sopenharmony_ci    };
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