162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/pci/intel,keembay-pcie.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Intel Keem Bay PCIe controller Root Complex mode
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
1162306a36Sopenharmony_ci  - Srikanth Thokala <srikanth.thokala@intel.com>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ciallOf:
1462306a36Sopenharmony_ci  - $ref: /schemas/pci/pci-bus.yaml#
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ciproperties:
1762306a36Sopenharmony_ci  compatible:
1862306a36Sopenharmony_ci    const: intel,keembay-pcie
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci  ranges:
2162306a36Sopenharmony_ci    maxItems: 1
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci  reset-gpios:
2462306a36Sopenharmony_ci    maxItems: 1
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ci  reg:
2762306a36Sopenharmony_ci    maxItems: 4
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ci  reg-names:
3062306a36Sopenharmony_ci    items:
3162306a36Sopenharmony_ci      - const: dbi
3262306a36Sopenharmony_ci      - const: atu
3362306a36Sopenharmony_ci      - const: config
3462306a36Sopenharmony_ci      - const: apb
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci  clocks:
3762306a36Sopenharmony_ci    maxItems: 2
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci  clock-names:
4062306a36Sopenharmony_ci    items:
4162306a36Sopenharmony_ci      - const: master
4262306a36Sopenharmony_ci      - const: aux
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci  interrupts:
4562306a36Sopenharmony_ci    maxItems: 3
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci  interrupt-names:
4862306a36Sopenharmony_ci    items:
4962306a36Sopenharmony_ci      - const: pcie
5062306a36Sopenharmony_ci      - const: pcie_ev
5162306a36Sopenharmony_ci      - const: pcie_err
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_ci  num-lanes:
5462306a36Sopenharmony_ci    description: Number of lanes to use.
5562306a36Sopenharmony_ci    enum: [ 1, 2 ]
5662306a36Sopenharmony_ci
5762306a36Sopenharmony_cirequired:
5862306a36Sopenharmony_ci  - compatible
5962306a36Sopenharmony_ci  - reg
6062306a36Sopenharmony_ci  - reg-names
6162306a36Sopenharmony_ci  - ranges
6262306a36Sopenharmony_ci  - clocks
6362306a36Sopenharmony_ci  - clock-names
6462306a36Sopenharmony_ci  - interrupts
6562306a36Sopenharmony_ci  - interrupt-names
6662306a36Sopenharmony_ci  - reset-gpios
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ciunevaluatedProperties: false
6962306a36Sopenharmony_ci
7062306a36Sopenharmony_ciexamples:
7162306a36Sopenharmony_ci  - |
7262306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/arm-gic.h>
7362306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/irq.h>
7462306a36Sopenharmony_ci    #include <dt-bindings/gpio/gpio.h>
7562306a36Sopenharmony_ci    #define KEEM_BAY_A53_PCIE
7662306a36Sopenharmony_ci    #define KEEM_BAY_A53_AUX_PCIE
7762306a36Sopenharmony_ci    pcie@37000000 {
7862306a36Sopenharmony_ci          compatible = "intel,keembay-pcie";
7962306a36Sopenharmony_ci          reg = <0x37000000 0x00001000>,
8062306a36Sopenharmony_ci                <0x37300000 0x00001000>,
8162306a36Sopenharmony_ci                <0x36e00000 0x00200000>,
8262306a36Sopenharmony_ci                <0x37800000 0x00000200>;
8362306a36Sopenharmony_ci          reg-names = "dbi", "atu", "config", "apb";
8462306a36Sopenharmony_ci          #address-cells = <3>;
8562306a36Sopenharmony_ci          #size-cells = <2>;
8662306a36Sopenharmony_ci          device_type = "pci";
8762306a36Sopenharmony_ci          ranges = <0x02000000 0 0x36000000 0x36000000 0 0x00e00000>;
8862306a36Sopenharmony_ci          interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
8962306a36Sopenharmony_ci                       <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
9062306a36Sopenharmony_ci                       <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
9162306a36Sopenharmony_ci          interrupt-names = "pcie", "pcie_ev", "pcie_err";
9262306a36Sopenharmony_ci          clocks = <&scmi_clk KEEM_BAY_A53_PCIE>,
9362306a36Sopenharmony_ci                   <&scmi_clk KEEM_BAY_A53_AUX_PCIE>;
9462306a36Sopenharmony_ci          clock-names = "master", "aux";
9562306a36Sopenharmony_ci          reset-gpios = <&pca2 9 GPIO_ACTIVE_LOW>;
9662306a36Sopenharmony_ci          num-lanes = <2>;
9762306a36Sopenharmony_ci    };
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