162306a36Sopenharmony_ci* Axis ARTPEC-6 PCIe interface 262306a36Sopenharmony_ci 362306a36Sopenharmony_ciThis PCIe host controller is based on the Synopsys DesignWare PCIe IP 462306a36Sopenharmony_ciand thus inherits all the common properties defined in snps,dw-pcie.yaml. 562306a36Sopenharmony_ci 662306a36Sopenharmony_ciRequired properties: 762306a36Sopenharmony_ci- compatible: "axis,artpec6-pcie", "snps,dw-pcie" for ARTPEC-6 in RC mode; 862306a36Sopenharmony_ci "axis,artpec6-pcie-ep", "snps,dw-pcie" for ARTPEC-6 in EP mode; 962306a36Sopenharmony_ci "axis,artpec7-pcie", "snps,dw-pcie" for ARTPEC-7 in RC mode; 1062306a36Sopenharmony_ci "axis,artpec7-pcie-ep", "snps,dw-pcie" for ARTPEC-7 in EP mode; 1162306a36Sopenharmony_ci- reg: base addresses and lengths of the PCIe controller (DBI), 1262306a36Sopenharmony_ci the PHY controller, and configuration address space. 1362306a36Sopenharmony_ci- reg-names: Must include the following entries: 1462306a36Sopenharmony_ci - "dbi" 1562306a36Sopenharmony_ci - "phy" 1662306a36Sopenharmony_ci - "config" 1762306a36Sopenharmony_ci- interrupts: A list of interrupt outputs of the controller. Must contain an 1862306a36Sopenharmony_ci entry for each entry in the interrupt-names property. 1962306a36Sopenharmony_ci- interrupt-names: Must include the following entries: 2062306a36Sopenharmony_ci - "msi": The interrupt that is asserted when an MSI is received 2162306a36Sopenharmony_ci- axis,syscon-pcie: A phandle pointing to the ARTPEC-6 system controller, 2262306a36Sopenharmony_ci used to enable and control the Synopsys IP. 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ciExample: 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci pcie@f8050000 { 2762306a36Sopenharmony_ci compatible = "axis,artpec6-pcie", "snps,dw-pcie"; 2862306a36Sopenharmony_ci reg = <0xf8050000 0x2000 2962306a36Sopenharmony_ci 0xf8040000 0x1000 3062306a36Sopenharmony_ci 0xc0000000 0x2000>; 3162306a36Sopenharmony_ci reg-names = "dbi", "phy", "config"; 3262306a36Sopenharmony_ci #address-cells = <3>; 3362306a36Sopenharmony_ci #size-cells = <2>; 3462306a36Sopenharmony_ci device_type = "pci"; 3562306a36Sopenharmony_ci /* downstream I/O */ 3662306a36Sopenharmony_ci ranges = <0x81000000 0 0 0xc0002000 0 0x00010000 3762306a36Sopenharmony_ci /* non-prefetchable memory */ 3862306a36Sopenharmony_ci 0x82000000 0 0xc0012000 0xc0012000 0 0x1ffee000>; 3962306a36Sopenharmony_ci num-lanes = <2>; 4062306a36Sopenharmony_ci bus-range = <0x00 0xff>; 4162306a36Sopenharmony_ci interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 4262306a36Sopenharmony_ci interrupt-names = "msi"; 4362306a36Sopenharmony_ci #interrupt-cells = <1>; 4462306a36Sopenharmony_ci interrupt-map-mask = <0 0 0 0x7>; 4562306a36Sopenharmony_ci interrupt-map = <0 0 0 1 &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, 4662306a36Sopenharmony_ci <0 0 0 2 &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, 4762306a36Sopenharmony_ci <0 0 0 3 &intc GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, 4862306a36Sopenharmony_ci <0 0 0 4 &intc GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 4962306a36Sopenharmony_ci axis,syscon-pcie = <&syscon>; 5062306a36Sopenharmony_ci }; 51