162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/opp/opp-v1.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Generic OPP (Operating Performance Points) v1 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Viresh Kumar <viresh.kumar@linaro.org> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: |+ 1362306a36Sopenharmony_ci Devices work at voltage-current-frequency combinations and some implementations 1462306a36Sopenharmony_ci have the liberty of choosing these. These combinations are called Operating 1562306a36Sopenharmony_ci Performance Points aka OPPs. This document defines bindings for these OPPs 1662306a36Sopenharmony_ci applicable across wide range of devices. For illustration purpose, this document 1762306a36Sopenharmony_ci uses CPU as a device. 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci This binding only supports voltage-frequency pairs. 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ciselect: true 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ciproperties: 2462306a36Sopenharmony_ci operating-points: 2562306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32-matrix 2662306a36Sopenharmony_ci items: 2762306a36Sopenharmony_ci items: 2862306a36Sopenharmony_ci - description: Frequency in kHz 2962306a36Sopenharmony_ci - description: Voltage for OPP in uV 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ciadditionalProperties: true 3362306a36Sopenharmony_ciexamples: 3462306a36Sopenharmony_ci - | 3562306a36Sopenharmony_ci cpus { 3662306a36Sopenharmony_ci #address-cells = <1>; 3762306a36Sopenharmony_ci #size-cells = <0>; 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci cpu@0 { 4062306a36Sopenharmony_ci compatible = "arm,cortex-a9"; 4162306a36Sopenharmony_ci device_type = "cpu"; 4262306a36Sopenharmony_ci reg = <0>; 4362306a36Sopenharmony_ci next-level-cache = <&L2>; 4462306a36Sopenharmony_ci operating-points = 4562306a36Sopenharmony_ci /* kHz uV */ 4662306a36Sopenharmony_ci <792000 1100000>, 4762306a36Sopenharmony_ci <396000 950000>, 4862306a36Sopenharmony_ci <198000 850000>; 4962306a36Sopenharmony_ci }; 5062306a36Sopenharmony_ci }; 5162306a36Sopenharmony_ci... 52