162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/net/nfc/samsung,s3fwrn5.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Samsung S3FWRN5 NCI NFC Controller 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Krzysztof Kozlowski <krzk@kernel.org> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ciproperties: 1362306a36Sopenharmony_ci compatible: 1462306a36Sopenharmony_ci enum: 1562306a36Sopenharmony_ci - samsung,s3fwrn5-i2c 1662306a36Sopenharmony_ci - samsung,s3fwrn82 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci en-gpios: 1962306a36Sopenharmony_ci maxItems: 1 2062306a36Sopenharmony_ci description: 2162306a36Sopenharmony_ci Output GPIO pin used for enabling/disabling the chip 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci interrupts: 2462306a36Sopenharmony_ci maxItems: 1 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci reg: 2762306a36Sopenharmony_ci maxItems: 1 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci clocks: 3062306a36Sopenharmony_ci maxItems: 1 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci wake-gpios: 3362306a36Sopenharmony_ci maxItems: 1 3462306a36Sopenharmony_ci description: 3562306a36Sopenharmony_ci Output GPIO pin used to enter firmware mode and sleep/wakeup control 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci s3fwrn5,en-gpios: 3862306a36Sopenharmony_ci maxItems: 1 3962306a36Sopenharmony_ci deprecated: true 4062306a36Sopenharmony_ci description: 4162306a36Sopenharmony_ci Use en-gpios 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci s3fwrn5,fw-gpios: 4462306a36Sopenharmony_ci maxItems: 1 4562306a36Sopenharmony_ci deprecated: true 4662306a36Sopenharmony_ci description: 4762306a36Sopenharmony_ci Use wake-gpios 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ciadditionalProperties: false 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_cirequired: 5262306a36Sopenharmony_ci - compatible 5362306a36Sopenharmony_ci - en-gpios 5462306a36Sopenharmony_ci - wake-gpios 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ciallOf: 5762306a36Sopenharmony_ci - if: 5862306a36Sopenharmony_ci properties: 5962306a36Sopenharmony_ci compatible: 6062306a36Sopenharmony_ci contains: 6162306a36Sopenharmony_ci const: samsung,s3fwrn5-i2c 6262306a36Sopenharmony_ci then: 6362306a36Sopenharmony_ci required: 6462306a36Sopenharmony_ci - interrupts 6562306a36Sopenharmony_ci - reg 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ciexamples: 6862306a36Sopenharmony_ci - | 6962306a36Sopenharmony_ci #include <dt-bindings/gpio/gpio.h> 7062306a36Sopenharmony_ci #include <dt-bindings/interrupt-controller/irq.h> 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_ci i2c { 7362306a36Sopenharmony_ci #address-cells = <1>; 7462306a36Sopenharmony_ci #size-cells = <0>; 7562306a36Sopenharmony_ci 7662306a36Sopenharmony_ci s3fwrn5@27 { 7762306a36Sopenharmony_ci compatible = "samsung,s3fwrn5-i2c"; 7862306a36Sopenharmony_ci reg = <0x27>; 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci interrupt-parent = <&gpa1>; 8162306a36Sopenharmony_ci interrupts = <3 IRQ_TYPE_EDGE_RISING>; 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>; 8462306a36Sopenharmony_ci wake-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>; 8562306a36Sopenharmony_ci 8662306a36Sopenharmony_ci clocks = <&rpmcc 20>; 8762306a36Sopenharmony_ci }; 8862306a36Sopenharmony_ci }; 8962306a36Sopenharmony_ci # UART example on Raspberry Pi 9062306a36Sopenharmony_ci - | 9162306a36Sopenharmony_ci uart0 { 9262306a36Sopenharmony_ci nfc { 9362306a36Sopenharmony_ci compatible = "samsung,s3fwrn82"; 9462306a36Sopenharmony_ci 9562306a36Sopenharmony_ci en-gpios = <&gpio 20 GPIO_ACTIVE_HIGH>; 9662306a36Sopenharmony_ci wake-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; 9762306a36Sopenharmony_ci 9862306a36Sopenharmony_ci }; 9962306a36Sopenharmony_ci }; 100