162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/net/nfc/marvell,nci.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Marvell International Ltd. NCI NFC controller
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Krzysztof Kozlowski <krzk@kernel.org>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ciproperties:
1362306a36Sopenharmony_ci  compatible:
1462306a36Sopenharmony_ci    enum:
1562306a36Sopenharmony_ci      - marvell,nfc-i2c
1662306a36Sopenharmony_ci      - marvell,nfc-spi
1762306a36Sopenharmony_ci      - marvell,nfc-uart
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci  hci-muxed:
2062306a36Sopenharmony_ci    type: boolean
2162306a36Sopenharmony_ci    description: |
2262306a36Sopenharmony_ci      Specifies that the chip is muxing NCI over HCI frames
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci  interrupts:
2562306a36Sopenharmony_ci    maxItems: 1
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci  reg:
2862306a36Sopenharmony_ci    maxItems: 1
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci  reset-n-io:
3162306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/phandle-array
3262306a36Sopenharmony_ci    maxItems: 1
3362306a36Sopenharmony_ci    description: |
3462306a36Sopenharmony_ci      Output GPIO pin used to reset the chip (active low)
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci  i2c-int-falling:
3762306a36Sopenharmony_ci    type: boolean
3862306a36Sopenharmony_ci    description: |
3962306a36Sopenharmony_ci      For I2C type of connection. Specifies that the chip read event shall be
4062306a36Sopenharmony_ci      triggered on falling edge.
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ci  i2c-int-rising:
4362306a36Sopenharmony_ci    type: boolean
4462306a36Sopenharmony_ci    description: |
4562306a36Sopenharmony_ci      For I2C type of connection.  Specifies that the chip read event shall be
4662306a36Sopenharmony_ci      triggered on rising edge.
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci  break-control:
4962306a36Sopenharmony_ci    type: boolean
5062306a36Sopenharmony_ci    description: |
5162306a36Sopenharmony_ci      For UART type of connection. Specifies that the chip needs specific break
5262306a36Sopenharmony_ci      management.
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ci  flow-control:
5562306a36Sopenharmony_ci    type: boolean
5662306a36Sopenharmony_ci    description: |
5762306a36Sopenharmony_ci      For UART type of connection. Specifies that the chip is using RTS/CTS.
5862306a36Sopenharmony_ci
5962306a36Sopenharmony_ci  spi-cpha: true
6062306a36Sopenharmony_ci  spi-cpol: true
6162306a36Sopenharmony_ci
6262306a36Sopenharmony_cirequired:
6362306a36Sopenharmony_ci  - compatible
6462306a36Sopenharmony_ci
6562306a36Sopenharmony_ciallOf:
6662306a36Sopenharmony_ci  - if:
6762306a36Sopenharmony_ci      properties:
6862306a36Sopenharmony_ci        compatible:
6962306a36Sopenharmony_ci          contains:
7062306a36Sopenharmony_ci            const: marvell,nfc-i2c
7162306a36Sopenharmony_ci    then:
7262306a36Sopenharmony_ci      properties:
7362306a36Sopenharmony_ci        break-control: false
7462306a36Sopenharmony_ci        flow-control: false
7562306a36Sopenharmony_ci        spi-cpha: false
7662306a36Sopenharmony_ci        spi-cpol: false
7762306a36Sopenharmony_ci        spi-max-frequency: false
7862306a36Sopenharmony_ci      required:
7962306a36Sopenharmony_ci        - reg
8062306a36Sopenharmony_ci
8162306a36Sopenharmony_ci  - if:
8262306a36Sopenharmony_ci      properties:
8362306a36Sopenharmony_ci        compatible:
8462306a36Sopenharmony_ci          contains:
8562306a36Sopenharmony_ci            const: marvell,nfc-spi
8662306a36Sopenharmony_ci    then:
8762306a36Sopenharmony_ci      $ref: /schemas/spi/spi-peripheral-props.yaml#
8862306a36Sopenharmony_ci      properties:
8962306a36Sopenharmony_ci        break-control: false
9062306a36Sopenharmony_ci        flow-control: false
9162306a36Sopenharmony_ci        i2c-int-falling: false
9262306a36Sopenharmony_ci        i2c-int-rising: false
9362306a36Sopenharmony_ci      required:
9462306a36Sopenharmony_ci        - reg
9562306a36Sopenharmony_ci
9662306a36Sopenharmony_ci  - if:
9762306a36Sopenharmony_ci      properties:
9862306a36Sopenharmony_ci        compatible:
9962306a36Sopenharmony_ci          contains:
10062306a36Sopenharmony_ci            const: marvell,nfc-uart
10162306a36Sopenharmony_ci    then:
10262306a36Sopenharmony_ci      properties:
10362306a36Sopenharmony_ci        i2c-int-falling: false
10462306a36Sopenharmony_ci        i2c-int-rising: false
10562306a36Sopenharmony_ci        interrupts: false
10662306a36Sopenharmony_ci        spi-cpha: false
10762306a36Sopenharmony_ci        spi-cpol: false
10862306a36Sopenharmony_ci        spi-max-frequency: false
10962306a36Sopenharmony_ci        reg: false
11062306a36Sopenharmony_ci
11162306a36Sopenharmony_ciunevaluatedProperties: false
11262306a36Sopenharmony_ci
11362306a36Sopenharmony_ciexamples:
11462306a36Sopenharmony_ci  - |
11562306a36Sopenharmony_ci    #include <dt-bindings/gpio/gpio.h>
11662306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/irq.h>
11762306a36Sopenharmony_ci
11862306a36Sopenharmony_ci    i2c {
11962306a36Sopenharmony_ci        #address-cells = <1>;
12062306a36Sopenharmony_ci        #size-cells = <0>;
12162306a36Sopenharmony_ci
12262306a36Sopenharmony_ci        nfc@8 {
12362306a36Sopenharmony_ci            compatible = "marvell,nfc-i2c";
12462306a36Sopenharmony_ci            reg = <0x8>;
12562306a36Sopenharmony_ci
12662306a36Sopenharmony_ci            interrupt-parent = <&gpio3>;
12762306a36Sopenharmony_ci            interrupts = <21 IRQ_TYPE_EDGE_RISING>;
12862306a36Sopenharmony_ci
12962306a36Sopenharmony_ci            i2c-int-rising;
13062306a36Sopenharmony_ci
13162306a36Sopenharmony_ci            reset-n-io = <&gpio3 19 GPIO_ACTIVE_LOW>;
13262306a36Sopenharmony_ci        };
13362306a36Sopenharmony_ci    };
13462306a36Sopenharmony_ci
13562306a36Sopenharmony_ci  - |
13662306a36Sopenharmony_ci    #include <dt-bindings/gpio/gpio.h>
13762306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/irq.h>
13862306a36Sopenharmony_ci
13962306a36Sopenharmony_ci    spi {
14062306a36Sopenharmony_ci        #address-cells = <1>;
14162306a36Sopenharmony_ci        #size-cells = <0>;
14262306a36Sopenharmony_ci
14362306a36Sopenharmony_ci        nfc@0 {
14462306a36Sopenharmony_ci            compatible = "marvell,nfc-spi";
14562306a36Sopenharmony_ci            reg = <0>;
14662306a36Sopenharmony_ci
14762306a36Sopenharmony_ci            spi-max-frequency = <3000000>;
14862306a36Sopenharmony_ci            spi-cpha;
14962306a36Sopenharmony_ci            spi-cpol;
15062306a36Sopenharmony_ci
15162306a36Sopenharmony_ci            interrupt-parent = <&gpio1>;
15262306a36Sopenharmony_ci            interrupts = <17 IRQ_TYPE_EDGE_RISING>;
15362306a36Sopenharmony_ci
15462306a36Sopenharmony_ci            reset-n-io = <&gpio3 19 GPIO_ACTIVE_LOW>;
15562306a36Sopenharmony_ci        };
15662306a36Sopenharmony_ci    };
15762306a36Sopenharmony_ci
15862306a36Sopenharmony_ci  - |
15962306a36Sopenharmony_ci    #include <dt-bindings/gpio/gpio.h>
16062306a36Sopenharmony_ci
16162306a36Sopenharmony_ci    uart {
16262306a36Sopenharmony_ci        nfc {
16362306a36Sopenharmony_ci            compatible = "marvell,nfc-uart";
16462306a36Sopenharmony_ci
16562306a36Sopenharmony_ci            reset-n-io = <&gpio3 16 GPIO_ACTIVE_LOW>;
16662306a36Sopenharmony_ci
16762306a36Sopenharmony_ci            hci-muxed;
16862306a36Sopenharmony_ci            flow-control;
16962306a36Sopenharmony_ci        };
17062306a36Sopenharmony_ci    };
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