162306a36Sopenharmony_ciVitesse VSC73xx Switches 262306a36Sopenharmony_ci======================== 362306a36Sopenharmony_ci 462306a36Sopenharmony_ciThis defines device tree bindings for the Vitesse VSC73xx switch chips. 562306a36Sopenharmony_ciThe Vitesse company has been acquired by Microsemi and Microsemi has 662306a36Sopenharmony_cibeen acquired Microchip but retains this vendor branding. 762306a36Sopenharmony_ci 862306a36Sopenharmony_ciThe currently supported switch chips are: 962306a36Sopenharmony_ciVitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch 1062306a36Sopenharmony_ciVitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch 1162306a36Sopenharmony_ciVitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch 1262306a36Sopenharmony_ciVitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ciThis switch could have two different management interface. 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ciIf SPI interface is used, the device tree node is an SPI device so it must 1762306a36Sopenharmony_cireside inside a SPI bus device tree node, see spi/spi-bus.txt 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ciWhen the chip is connected to a parallel memory bus and work in memory-mapped 2062306a36Sopenharmony_ciI/O mode, a platform device is used to represent the vsc73xx. In this case it 2162306a36Sopenharmony_cimust reside inside a platform bus device tree node. 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ciRequired properties: 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci- compatible: must be exactly one of: 2662306a36Sopenharmony_ci "vitesse,vsc7385" 2762306a36Sopenharmony_ci "vitesse,vsc7388" 2862306a36Sopenharmony_ci "vitesse,vsc7395" 2962306a36Sopenharmony_ci "vitesse,vsc7398" 3062306a36Sopenharmony_ci- gpio-controller: indicates that this switch is also a GPIO controller, 3162306a36Sopenharmony_ci see gpio/gpio.txt 3262306a36Sopenharmony_ci- #gpio-cells: this must be set to <2> and indicates that we are a twocell 3362306a36Sopenharmony_ci GPIO controller, see gpio/gpio.txt 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ciOptional properties: 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci- reset-gpios: a handle to a GPIO line that can issue reset of the chip. 3862306a36Sopenharmony_ci It should be tagged as active low. 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ciRequired subnodes: 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ciSee net/dsa/dsa.txt for a list of additional required and optional properties 4362306a36Sopenharmony_ciand subnodes of DSA switches. 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ciExamples: 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ciSPI: 4862306a36Sopenharmony_ciswitch@0 { 4962306a36Sopenharmony_ci compatible = "vitesse,vsc7395"; 5062306a36Sopenharmony_ci reg = <0>; 5162306a36Sopenharmony_ci /* Specified for 2.5 MHz or below */ 5262306a36Sopenharmony_ci spi-max-frequency = <2500000>; 5362306a36Sopenharmony_ci gpio-controller; 5462306a36Sopenharmony_ci #gpio-cells = <2>; 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci ports { 5762306a36Sopenharmony_ci #address-cells = <1>; 5862306a36Sopenharmony_ci #size-cells = <0>; 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ci port@0 { 6162306a36Sopenharmony_ci reg = <0>; 6262306a36Sopenharmony_ci label = "lan1"; 6362306a36Sopenharmony_ci }; 6462306a36Sopenharmony_ci port@1 { 6562306a36Sopenharmony_ci reg = <1>; 6662306a36Sopenharmony_ci label = "lan2"; 6762306a36Sopenharmony_ci }; 6862306a36Sopenharmony_ci port@2 { 6962306a36Sopenharmony_ci reg = <2>; 7062306a36Sopenharmony_ci label = "lan3"; 7162306a36Sopenharmony_ci }; 7262306a36Sopenharmony_ci port@3 { 7362306a36Sopenharmony_ci reg = <3>; 7462306a36Sopenharmony_ci label = "lan4"; 7562306a36Sopenharmony_ci }; 7662306a36Sopenharmony_ci vsc: port@6 { 7762306a36Sopenharmony_ci reg = <6>; 7862306a36Sopenharmony_ci ethernet = <&gmac1>; 7962306a36Sopenharmony_ci phy-mode = "rgmii"; 8062306a36Sopenharmony_ci fixed-link { 8162306a36Sopenharmony_ci speed = <1000>; 8262306a36Sopenharmony_ci full-duplex; 8362306a36Sopenharmony_ci pause; 8462306a36Sopenharmony_ci }; 8562306a36Sopenharmony_ci }; 8662306a36Sopenharmony_ci }; 8762306a36Sopenharmony_ci}; 8862306a36Sopenharmony_ci 8962306a36Sopenharmony_ciPlatform: 9062306a36Sopenharmony_ciswitch@2,0 { 9162306a36Sopenharmony_ci #address-cells = <1>; 9262306a36Sopenharmony_ci #size-cells = <1>; 9362306a36Sopenharmony_ci compatible = "vitesse,vsc7385"; 9462306a36Sopenharmony_ci reg = <0x2 0x0 0x20000>; 9562306a36Sopenharmony_ci reset-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; 9662306a36Sopenharmony_ci 9762306a36Sopenharmony_ci ports { 9862306a36Sopenharmony_ci #address-cells = <1>; 9962306a36Sopenharmony_ci #size-cells = <0>; 10062306a36Sopenharmony_ci 10162306a36Sopenharmony_ci port@0 { 10262306a36Sopenharmony_ci reg = <0>; 10362306a36Sopenharmony_ci label = "lan1"; 10462306a36Sopenharmony_ci }; 10562306a36Sopenharmony_ci port@1 { 10662306a36Sopenharmony_ci reg = <1>; 10762306a36Sopenharmony_ci label = "lan2"; 10862306a36Sopenharmony_ci }; 10962306a36Sopenharmony_ci port@2 { 11062306a36Sopenharmony_ci reg = <2>; 11162306a36Sopenharmony_ci label = "lan3"; 11262306a36Sopenharmony_ci }; 11362306a36Sopenharmony_ci port@3 { 11462306a36Sopenharmony_ci reg = <3>; 11562306a36Sopenharmony_ci label = "lan4"; 11662306a36Sopenharmony_ci }; 11762306a36Sopenharmony_ci vsc: port@6 { 11862306a36Sopenharmony_ci reg = <6>; 11962306a36Sopenharmony_ci ethernet = <&enet0>; 12062306a36Sopenharmony_ci phy-mode = "rgmii"; 12162306a36Sopenharmony_ci fixed-link { 12262306a36Sopenharmony_ci speed = <1000>; 12362306a36Sopenharmony_ci full-duplex; 12462306a36Sopenharmony_ci pause; 12562306a36Sopenharmony_ci }; 12662306a36Sopenharmony_ci }; 12762306a36Sopenharmony_ci }; 12862306a36Sopenharmony_ci 12962306a36Sopenharmony_ci}; 130