162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/mtd/nand-controller.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: NAND Controller Common Properties 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Miquel Raynal <miquel.raynal@bootlin.com> 1162306a36Sopenharmony_ci - Richard Weinberger <richard@nod.at> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_cidescription: | 1462306a36Sopenharmony_ci The NAND controller should be represented with its own DT node, and 1562306a36Sopenharmony_ci all NAND chips attached to this controller should be defined as 1662306a36Sopenharmony_ci children nodes of the NAND controller. This representation should be 1762306a36Sopenharmony_ci enforced even for simple controllers supporting only one chip. 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ciproperties: 2062306a36Sopenharmony_ci $nodename: 2162306a36Sopenharmony_ci pattern: "^nand-controller(@.*)?" 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci "#address-cells": 2462306a36Sopenharmony_ci const: 1 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci "#size-cells": 2762306a36Sopenharmony_ci const: 0 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci ranges: true 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci cs-gpios: 3262306a36Sopenharmony_ci description: 3362306a36Sopenharmony_ci Array of chip-select available to the controller. The first 3462306a36Sopenharmony_ci entries are a 1:1 mapping of the available chip-select on the 3562306a36Sopenharmony_ci NAND controller (even if they are not used). As many additional 3662306a36Sopenharmony_ci chip-select as needed may follow and should be phandles of GPIO 3762306a36Sopenharmony_ci lines. 'reg' entries of the NAND chip subnodes become indexes of 3862306a36Sopenharmony_ci this array when this property is present. 3962306a36Sopenharmony_ci minItems: 1 4062306a36Sopenharmony_ci maxItems: 8 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_cipatternProperties: 4362306a36Sopenharmony_ci "^nand@[a-f0-9]$": 4462306a36Sopenharmony_ci type: object 4562306a36Sopenharmony_ci $ref: raw-nand-chip.yaml# 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_cirequired: 4862306a36Sopenharmony_ci - "#address-cells" 4962306a36Sopenharmony_ci - "#size-cells" 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ci# This is a generic file other binding inherit from and extend 5262306a36Sopenharmony_ciadditionalProperties: true 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ciexamples: 5562306a36Sopenharmony_ci - | 5662306a36Sopenharmony_ci nand-controller { 5762306a36Sopenharmony_ci #address-cells = <1>; 5862306a36Sopenharmony_ci #size-cells = <0>; 5962306a36Sopenharmony_ci cs-gpios = <0>, <&gpioA 1>; /* A single native CS is available */ 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_ci /* controller specific properties */ 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci nand@0 { 6462306a36Sopenharmony_ci reg = <0>; /* Native CS */ 6562306a36Sopenharmony_ci /* NAND chip specific properties */ 6662306a36Sopenharmony_ci }; 6762306a36Sopenharmony_ci 6862306a36Sopenharmony_ci nand@1 { 6962306a36Sopenharmony_ci reg = <1>; /* GPIO CS */ 7062306a36Sopenharmony_ci }; 7162306a36Sopenharmony_ci }; 72