162306a36Sopenharmony_ciMAX77620 Power management IC from Maxim Semiconductor.
262306a36Sopenharmony_ci
362306a36Sopenharmony_ciRequired properties:
462306a36Sopenharmony_ci-------------------
562306a36Sopenharmony_ci- compatible: Must be one of
662306a36Sopenharmony_ci		"maxim,max77620"
762306a36Sopenharmony_ci		"maxim,max20024"
862306a36Sopenharmony_ci		"maxim,max77663"
962306a36Sopenharmony_ci- reg: I2C device address.
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ciOptional properties:
1262306a36Sopenharmony_ci-------------------
1362306a36Sopenharmony_ci- interrupts:		The interrupt on the parent the controller is
1462306a36Sopenharmony_ci			connected to.
1562306a36Sopenharmony_ci- interrupt-controller: Marks the device node as an interrupt controller.
1662306a36Sopenharmony_ci- #interrupt-cells:	is <2> and their usage is compliant to the 2 cells
1762306a36Sopenharmony_ci			variant of <../interrupt-controller/interrupts.txt>
1862306a36Sopenharmony_ci			IRQ numbers for different interrupt source of MAX77620
1962306a36Sopenharmony_ci			are defined at dt-bindings/mfd/max77620.h.
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ci- system-power-controller: Indicates that this PMIC is controlling the
2262306a36Sopenharmony_ci			   system power, see [1] for more details.
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci[1] Documentation/devicetree/bindings/power/power-controller.txt
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ciOptional subnodes and their properties:
2762306a36Sopenharmony_ci=======================================
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ciFlexible power sequence configurations:
3062306a36Sopenharmony_ci--------------------------------------
3162306a36Sopenharmony_ciThe Flexible Power Sequencer (FPS) allows each regulator to power up under
3262306a36Sopenharmony_cihardware or software control. Additionally, each regulator can power on
3362306a36Sopenharmony_ciindependently or among a group of other regulators with an adjustable power-up
3462306a36Sopenharmony_ciand power-down delays (sequencing). GPIO1, GPIO2, and GPIO3 can be programmed
3562306a36Sopenharmony_cito be part of a sequence allowing external regulators to be sequenced along
3662306a36Sopenharmony_ciwith internal regulators. 32KHz clock can be programmed to be part of a
3762306a36Sopenharmony_cisequence.
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ciThe flexible sequencing structure consists of two hardware enable inputs
4062306a36Sopenharmony_ci(EN0, EN1), and 3 master sequencing timers called FPS0, FPS1 and FPS2.
4162306a36Sopenharmony_ciEach master sequencing timer is programmable through its configuration
4262306a36Sopenharmony_ciregister to have a hardware enable source (EN1 or EN2) or a software enable
4362306a36Sopenharmony_cisource (SW). When enabled/disabled, the master sequencing timer generates
4462306a36Sopenharmony_cieight sequencing events on different time periods called slots. The time
4562306a36Sopenharmony_ciperiod between each event is programmable within the configuration register.
4662306a36Sopenharmony_ciEach regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible power
4762306a36Sopenharmony_cisequence slave register which allows its enable source to be specified as
4862306a36Sopenharmony_cia flexible power sequencer timer or a software bit. When a FPS source of
4962306a36Sopenharmony_ciregulators, GPIOs and clocks specifies the enable source to be a flexible
5062306a36Sopenharmony_cipower sequencer, the power up and power down delays can be specified in
5162306a36Sopenharmony_cithe regulators, GPIOs and clocks flexible power sequencer configuration
5262306a36Sopenharmony_ciregisters.
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ciWhen FPS event cleared (set to LOW), regulators, GPIOs and 32KHz
5562306a36Sopenharmony_ciclock are set into following state at the sequencing event that
5662306a36Sopenharmony_cicorresponds to its flexible sequencer configuration register.
5762306a36Sopenharmony_ci	Sleep state: 			In this state, regulators, GPIOs
5862306a36Sopenharmony_ci					and 32KHz clock get disabled at
5962306a36Sopenharmony_ci					the sequencing event.
6062306a36Sopenharmony_ci	Global Low Power Mode (GLPM):	In this state, regulators are set in
6162306a36Sopenharmony_ci					low power mode at the sequencing event.
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ciThe configuration parameters of FPS is provided through sub-node "fps"
6462306a36Sopenharmony_ciand their child for FPS specific. The child node name for FPS are "fps0",
6562306a36Sopenharmony_ci"fps1", and "fps2" for FPS0, FPS1 and FPS2 respectively.
6662306a36Sopenharmony_ci
6762306a36Sopenharmony_ciThe FPS configurations like FPS source, power up and power down slots for
6862306a36Sopenharmony_ciregulators, GPIOs and 32kHz clocks are provided in their respective
6962306a36Sopenharmony_ciconfiguration nodes which is explained in respective sub-system DT
7062306a36Sopenharmony_cibinding document.
7162306a36Sopenharmony_ci
7262306a36Sopenharmony_ciThere is need for different FPS configuration parameters based on system
7362306a36Sopenharmony_cistate like when system state changed from active to suspend or active to
7462306a36Sopenharmony_cipower off (shutdown).
7562306a36Sopenharmony_ci
7662306a36Sopenharmony_ciOptional properties:
7762306a36Sopenharmony_ci-------------------
7862306a36Sopenharmony_ci-maxim,fps-event-source:		u32, FPS event source like external
7962306a36Sopenharmony_ci					hardware input to PMIC i.e. EN0, EN1 or
8062306a36Sopenharmony_ci					software (SW).
8162306a36Sopenharmony_ci					The macros are defined on
8262306a36Sopenharmony_ci						dt-bindings/mfd/max77620.h
8362306a36Sopenharmony_ci					for different control source.
8462306a36Sopenharmony_ci					- MAX77620_FPS_EVENT_SRC_EN0
8562306a36Sopenharmony_ci						for hardware input pin EN0.
8662306a36Sopenharmony_ci					- MAX77620_FPS_EVENT_SRC_EN1
8762306a36Sopenharmony_ci						for hardware input pin EN1.
8862306a36Sopenharmony_ci					- MAX77620_FPS_EVENT_SRC_SW
8962306a36Sopenharmony_ci						for software control.
9062306a36Sopenharmony_ci
9162306a36Sopenharmony_ci-maxim,shutdown-fps-time-period-us:	u32, FPS time period in microseconds
9262306a36Sopenharmony_ci					when system enters in to shutdown
9362306a36Sopenharmony_ci					state.
9462306a36Sopenharmony_ci
9562306a36Sopenharmony_ci-maxim,suspend-fps-time-period-us:	u32, FPS time period in microseconds
9662306a36Sopenharmony_ci					when system enters in to suspend state.
9762306a36Sopenharmony_ci
9862306a36Sopenharmony_ci-maxim,device-state-on-disabled-event:	u32, describe the PMIC state when FPS
9962306a36Sopenharmony_ci					event cleared (set to LOW) whether it
10062306a36Sopenharmony_ci					should go to sleep state or low-power
10162306a36Sopenharmony_ci					state. Following are valid values:
10262306a36Sopenharmony_ci					- MAX77620_FPS_INACTIVE_STATE_SLEEP
10362306a36Sopenharmony_ci						to set the PMIC state to sleep.
10462306a36Sopenharmony_ci					- MAX77620_FPS_INACTIVE_STATE_LOW_POWER
10562306a36Sopenharmony_ci						to set the PMIC state to low
10662306a36Sopenharmony_ci						power.
10762306a36Sopenharmony_ci					Absence of this property or other value
10862306a36Sopenharmony_ci					will not change device state when FPS
10962306a36Sopenharmony_ci					event get cleared.
11062306a36Sopenharmony_ci
11162306a36Sopenharmony_ciHere supported time periods by device in microseconds are as follows:
11262306a36Sopenharmony_ciMAX77620 supports 40, 80, 160, 320, 640, 1280, 2560 and 5120 microseconds.
11362306a36Sopenharmony_ciMAX20024 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds.
11462306a36Sopenharmony_ciMAX77663 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds.
11562306a36Sopenharmony_ci
11662306a36Sopenharmony_ci-maxim,power-ok-control: configure map power ok bit
11762306a36Sopenharmony_ci			1: Enables POK(Power OK) to control nRST_IO and GPIO1
11862306a36Sopenharmony_ci			POK function.
11962306a36Sopenharmony_ci			0: Disables POK control.
12062306a36Sopenharmony_ci			if property missing, do not configure MPOK bit.
12162306a36Sopenharmony_ci			If POK mapping is enabled for GPIO1/nRST_IO then,
12262306a36Sopenharmony_ci			GPIO1/nRST_IO pins are HIGH only if all rails
12362306a36Sopenharmony_ci			that have POK control enabled are HIGH.
12462306a36Sopenharmony_ci			If any of the rails goes down(which are enabled for POK
12562306a36Sopenharmony_ci			control) then, GPIO1/nRST_IO goes LOW.
12662306a36Sopenharmony_ci			this property is valid for max20024 only.
12762306a36Sopenharmony_ci
12862306a36Sopenharmony_ciFor DT binding details of different sub modules like GPIO, pincontrol,
12962306a36Sopenharmony_ciregulator, power, please refer respective device-tree binding document
13062306a36Sopenharmony_ciunder their respective sub-system directories.
13162306a36Sopenharmony_ci
13262306a36Sopenharmony_ciExample:
13362306a36Sopenharmony_ci--------
13462306a36Sopenharmony_ci#include <dt-bindings/mfd/max77620.h>
13562306a36Sopenharmony_ci
13662306a36Sopenharmony_cimax77620@3c {
13762306a36Sopenharmony_ci	compatible = "maxim,max77620";
13862306a36Sopenharmony_ci	reg = <0x3c>;
13962306a36Sopenharmony_ci
14062306a36Sopenharmony_ci	interrupt-parent = <&intc>;
14162306a36Sopenharmony_ci	interrupts = <0 86 IRQ_TYPE_NONE>;
14262306a36Sopenharmony_ci
14362306a36Sopenharmony_ci	interrupt-controller;
14462306a36Sopenharmony_ci	#interrupt-cells = <2>;
14562306a36Sopenharmony_ci
14662306a36Sopenharmony_ci	fps {
14762306a36Sopenharmony_ci		fps0 {
14862306a36Sopenharmony_ci			maxim,shutdown-fps-time-period-us = <1280>;
14962306a36Sopenharmony_ci			maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
15062306a36Sopenharmony_ci		};
15162306a36Sopenharmony_ci
15262306a36Sopenharmony_ci		fps1 {
15362306a36Sopenharmony_ci			maxim,shutdown-fps-time-period-us = <1280>;
15462306a36Sopenharmony_ci			maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
15562306a36Sopenharmony_ci		};
15662306a36Sopenharmony_ci
15762306a36Sopenharmony_ci		fps2 {
15862306a36Sopenharmony_ci			maxim,shutdown-fps-time-period-us = <1280>;
15962306a36Sopenharmony_ci			maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_SW>;
16062306a36Sopenharmony_ci		};
16162306a36Sopenharmony_ci	};
16262306a36Sopenharmony_ci};
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