162306a36Sopenharmony_ciHisilicon Hi655x Power Management Integrated Circuit (PMIC)
262306a36Sopenharmony_ci
362306a36Sopenharmony_ciThe hardware layout for access PMIC Hi655x from AP SoC Hi6220.
462306a36Sopenharmony_ciBetween PMIC Hi655x and Hi6220, the physical signal channel is SSI.
562306a36Sopenharmony_ciWe can use memory-mapped I/O to communicate.
662306a36Sopenharmony_ci
762306a36Sopenharmony_ci+----------------+             +-------------+
862306a36Sopenharmony_ci|                |             |             |
962306a36Sopenharmony_ci|    Hi6220      |   SSI bus   |   Hi655x    |
1062306a36Sopenharmony_ci|                |-------------|             |
1162306a36Sopenharmony_ci|                |(REGMAP_MMIO)|             |
1262306a36Sopenharmony_ci+----------------+             +-------------+
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ciRequired properties:
1562306a36Sopenharmony_ci- compatible:           Should be "hisilicon,hi655x-pmic".
1662306a36Sopenharmony_ci- reg:                  Base address of PMIC on Hi6220 SoC.
1762306a36Sopenharmony_ci- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain).
1862306a36Sopenharmony_ci- pmic-gpios:           The GPIO used by PMIC IRQ.
1962306a36Sopenharmony_ci- #clock-cells:		From common clock binding; shall be set to 0
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ciOptional properties:
2262306a36Sopenharmony_ci- clock-output-names: From common clock binding to override the
2362306a36Sopenharmony_ci  default output clock name
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ciExample:
2662306a36Sopenharmony_ci	pmic: pmic@f8000000 {
2762306a36Sopenharmony_ci		compatible = "hisilicon,hi655x-pmic";
2862306a36Sopenharmony_ci		reg = <0x0 0xf8000000 0x0 0x1000>;
2962306a36Sopenharmony_ci		interrupt-controller;
3062306a36Sopenharmony_ci		#interrupt-cells = <2>;
3162306a36Sopenharmony_ci		pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
3262306a36Sopenharmony_ci		#clock-cells = <0>;
3362306a36Sopenharmony_ci	}
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