xref: /kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/ti,da850-vpif.txt (revision 62306a36)

Texas Instruments VPIF
----------------------

The TI Video Port InterFace (VPIF) is the primary component for video
capture and display on the DA850/AM18x family of TI DaVinci/Sitara
SoCs.

TI Document reference: SPRUH82C, Chapter 35
http://www.ti.com/lit/pdf/spruh82

Required properties:
- compatible: must be "ti,da850-vpif"
- reg: physical base address and length of the registers set for the device;
- interrupts: should contain IRQ line for the VPIF

Video Capture:

VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a
single 16-bit channel. It should contain one or two port child nodes
with child 'endpoint' node. If there are two ports then port@0 must
describe the input and port@1 output channels. Please refer to the
bindings defined in
Documentation/devicetree/bindings/media/video-interfaces.txt.

Example using 2 8-bit input channels, one of which is connected to an
I2C-connected TVP5147 decoder:

	vpif: vpif@217000 {
		compatible = "ti,da850-vpif";
		reg = <0x217000 0x1000>;
		interrupts = <92>;

		port@0 {
			vpif_input_ch0: endpoint@0 {
				reg = <0>;
				bus-width = <8>;
				remote-endpoint = <&composite_in>;
			};

			vpif_input_ch1: endpoint@1 {
				reg = <1>;
				bus-width = <8>;
				data-shift = <8>;
			};
		};

		port@1 {
			vpif_output_ch0: endpoint {
				bus-width = <8>;
				remote-endpoint = <&composite_out>;
			};
		};
	};

[ ... ]

&i2c0 {

	tvp5147@5d {
		compatible = "ti,tvp5147";
		reg = <0x5d>;

		port {
			composite_in: endpoint {
				hsync-active = <1>;
				vsync-active = <1>;
				pclk-sample = <0>;

				/* VPIF channel 0 (lower 8-bits) */
				remote-endpoint = <&vpif_input_ch0>;
				bus-width = <8>;
			};
		};
	};

	adv7343@2a {
		compatible = "adi,adv7343";
		reg = <0x2a>;

		port {
			composite_out: endpoint {
				adi,dac-enable = <1 1 1>;
				adi,sd-dac-enable = <1>;

				remote-endpoint = <&vpif_output_ch0>;
				bus-width = <8>;
			};
		};
	};
};


Alternatively, an example when the bus is configured as a single
16-bit input (e.g. for raw-capture mode):

	vpif: vpif@217000 {
		compatible = "ti,da850-vpif";
		reg = <0x217000 0x1000>;
		interrupts = <92>;

		port {
			vpif_ch0: endpoint {
				  bus-width = <16>;
			};
		};
	};