162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/media/samsung,exynos4210-csis.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Samsung S5P/Exynos SoC series MIPI CSI-2 receiver (MIPI CSIS)
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
1162306a36Sopenharmony_ci  - Sylwester Nawrocki <s.nawrocki@samsung.com>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ciproperties:
1462306a36Sopenharmony_ci  compatible:
1562306a36Sopenharmony_ci    enum:
1662306a36Sopenharmony_ci      - samsung,s5pv210-csis
1762306a36Sopenharmony_ci      - samsung,exynos4210-csis
1862306a36Sopenharmony_ci      - samsung,exynos4212-csis
1962306a36Sopenharmony_ci      - samsung,exynos5250-csis
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ci  reg:
2262306a36Sopenharmony_ci    maxItems: 1
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci  '#address-cells':
2562306a36Sopenharmony_ci    const: 1
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci  '#size-cells':
2862306a36Sopenharmony_ci    const: 0
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci  bus-width:
3162306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint32
3262306a36Sopenharmony_ci    enum: [2, 4]
3362306a36Sopenharmony_ci    description:
3462306a36Sopenharmony_ci      Number of data lines supported.
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci  clocks:
3762306a36Sopenharmony_ci    maxItems: 2
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci  clock-names:
4062306a36Sopenharmony_ci    items:
4162306a36Sopenharmony_ci      - const: csis
4262306a36Sopenharmony_ci      - const: sclk_csis
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci  clock-frequency:
4562306a36Sopenharmony_ci    default: 166000000
4662306a36Sopenharmony_ci    description:
4762306a36Sopenharmony_ci      The IP's main (system bus) clock frequency in Hz.
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_ci  interrupts:
5062306a36Sopenharmony_ci    maxItems: 1
5162306a36Sopenharmony_ci
5262306a36Sopenharmony_ci  phys:
5362306a36Sopenharmony_ci    maxItems: 1
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci  phy-names:
5662306a36Sopenharmony_ci    items:
5762306a36Sopenharmony_ci      - const: csis
5862306a36Sopenharmony_ci
5962306a36Sopenharmony_ci  power-domains:
6062306a36Sopenharmony_ci    maxItems: 1
6162306a36Sopenharmony_ci
6262306a36Sopenharmony_ci  vddio-supply:
6362306a36Sopenharmony_ci    description: MIPI CSIS I/O and PLL voltage supply (e.g. 1.8V).
6462306a36Sopenharmony_ci
6562306a36Sopenharmony_ci  vddcore-supply:
6662306a36Sopenharmony_ci    description: MIPI CSIS Core voltage supply (e.g. 1.1V).
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_cipatternProperties:
6962306a36Sopenharmony_ci  "^port@[34]$":
7062306a36Sopenharmony_ci    $ref: /schemas/graph.yaml#/$defs/port-base
7162306a36Sopenharmony_ci    additionalProperties: false
7262306a36Sopenharmony_ci    description:
7362306a36Sopenharmony_ci      Camera input port.
7462306a36Sopenharmony_ci
7562306a36Sopenharmony_ci    properties:
7662306a36Sopenharmony_ci      reg:
7762306a36Sopenharmony_ci        enum: [3, 4]
7862306a36Sopenharmony_ci
7962306a36Sopenharmony_ci      endpoint:
8062306a36Sopenharmony_ci        $ref: video-interfaces.yaml#
8162306a36Sopenharmony_ci        unevaluatedProperties: false
8262306a36Sopenharmony_ci
8362306a36Sopenharmony_ci        properties:
8462306a36Sopenharmony_ci          data-lanes:
8562306a36Sopenharmony_ci            minItems: 1
8662306a36Sopenharmony_ci            maxItems: 4
8762306a36Sopenharmony_ci
8862306a36Sopenharmony_ci          samsung,csis-hs-settle:
8962306a36Sopenharmony_ci            $ref: /schemas/types.yaml#/definitions/uint32
9062306a36Sopenharmony_ci            description: Differential receiver (HS-RX) settle time.
9162306a36Sopenharmony_ci
9262306a36Sopenharmony_ci          samsung,csis-wclk:
9362306a36Sopenharmony_ci            type: boolean
9462306a36Sopenharmony_ci            description:
9562306a36Sopenharmony_ci              CSI-2 wrapper clock selection. If this property is present external clock
9662306a36Sopenharmony_ci              from CMU will be used, or the bus clock if it's not specified.
9762306a36Sopenharmony_ci
9862306a36Sopenharmony_ci        required:
9962306a36Sopenharmony_ci          - data-lanes
10062306a36Sopenharmony_ci
10162306a36Sopenharmony_ci    required:
10262306a36Sopenharmony_ci      - reg
10362306a36Sopenharmony_ci
10462306a36Sopenharmony_cirequired:
10562306a36Sopenharmony_ci  - compatible
10662306a36Sopenharmony_ci  - reg
10762306a36Sopenharmony_ci  - bus-width
10862306a36Sopenharmony_ci  - clocks
10962306a36Sopenharmony_ci  - clock-names
11062306a36Sopenharmony_ci  - interrupts
11162306a36Sopenharmony_ci  - vddio-supply
11262306a36Sopenharmony_ci  - vddcore-supply
11362306a36Sopenharmony_ci
11462306a36Sopenharmony_cianyOf:
11562306a36Sopenharmony_ci  - required:
11662306a36Sopenharmony_ci      - port@3
11762306a36Sopenharmony_ci  - required:
11862306a36Sopenharmony_ci      - port@4
11962306a36Sopenharmony_ci
12062306a36Sopenharmony_ciallOf:
12162306a36Sopenharmony_ci  - if:
12262306a36Sopenharmony_ci      required:
12362306a36Sopenharmony_ci        - samsung,isp-wb
12462306a36Sopenharmony_ci    then:
12562306a36Sopenharmony_ci      required:
12662306a36Sopenharmony_ci        - samsung,sysreg
12762306a36Sopenharmony_ci
12862306a36Sopenharmony_ciadditionalProperties: false
12962306a36Sopenharmony_ci
13062306a36Sopenharmony_ciexamples:
13162306a36Sopenharmony_ci  - |
13262306a36Sopenharmony_ci    #include <dt-bindings/clock/exynos4.h>
13362306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/arm-gic.h>
13462306a36Sopenharmony_ci
13562306a36Sopenharmony_ci    csis@11890000 {
13662306a36Sopenharmony_ci        compatible = "samsung,exynos4210-csis";
13762306a36Sopenharmony_ci        reg = <0x11890000 0x4000>;
13862306a36Sopenharmony_ci        clocks = <&clock CLK_CSIS1>,
13962306a36Sopenharmony_ci                 <&clock CLK_SCLK_CSIS1>;
14062306a36Sopenharmony_ci        clock-names = "csis", "sclk_csis";
14162306a36Sopenharmony_ci        assigned-clocks = <&clock CLK_MOUT_CSIS1>,
14262306a36Sopenharmony_ci                          <&clock CLK_SCLK_CSIS1>;
14362306a36Sopenharmony_ci        assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
14462306a36Sopenharmony_ci        assigned-clock-rates = <0>, <176000000>;
14562306a36Sopenharmony_ci
14662306a36Sopenharmony_ci        interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
14762306a36Sopenharmony_ci
14862306a36Sopenharmony_ci        bus-width = <2>;
14962306a36Sopenharmony_ci        power-domains = <&pd_cam>;
15062306a36Sopenharmony_ci        phys = <&mipi_phy 2>;
15162306a36Sopenharmony_ci        phy-names = "csis";
15262306a36Sopenharmony_ci
15362306a36Sopenharmony_ci        vddcore-supply = <&ldo8_reg>;
15462306a36Sopenharmony_ci        vddio-supply = <&ldo10_reg>;
15562306a36Sopenharmony_ci
15662306a36Sopenharmony_ci        #address-cells = <1>;
15762306a36Sopenharmony_ci        #size-cells = <0>;
15862306a36Sopenharmony_ci
15962306a36Sopenharmony_ci        /* Camera D (4) MIPI CSI-2 (CSIS1) */
16062306a36Sopenharmony_ci        port@4 {
16162306a36Sopenharmony_ci            reg = <4>;
16262306a36Sopenharmony_ci
16362306a36Sopenharmony_ci            endpoint {
16462306a36Sopenharmony_ci                remote-endpoint = <&is_s5k6a3_ep>;
16562306a36Sopenharmony_ci                data-lanes = <1>;
16662306a36Sopenharmony_ci                samsung,csis-hs-settle = <18>;
16762306a36Sopenharmony_ci                samsung,csis-wclk;
16862306a36Sopenharmony_ci            };
16962306a36Sopenharmony_ci        };
17062306a36Sopenharmony_ci    };
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