162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/media/mediatek-jpeg-decoder.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: MediaTek JPEG Decoder 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Xia Jiang <xia.jiang@mediatek.com> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: |- 1362306a36Sopenharmony_ci Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ciproperties: 1662306a36Sopenharmony_ci compatible: 1762306a36Sopenharmony_ci oneOf: 1862306a36Sopenharmony_ci - items: 1962306a36Sopenharmony_ci - enum: 2062306a36Sopenharmony_ci - mediatek,mt8173-jpgdec 2162306a36Sopenharmony_ci - mediatek,mt2701-jpgdec 2262306a36Sopenharmony_ci - items: 2362306a36Sopenharmony_ci - enum: 2462306a36Sopenharmony_ci - mediatek,mt7623-jpgdec 2562306a36Sopenharmony_ci - mediatek,mt8188-jpgdec 2662306a36Sopenharmony_ci - const: mediatek,mt2701-jpgdec 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci reg: 2962306a36Sopenharmony_ci maxItems: 1 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci interrupts: 3262306a36Sopenharmony_ci maxItems: 1 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci clocks: 3562306a36Sopenharmony_ci maxItems: 2 3662306a36Sopenharmony_ci minItems: 2 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_ci clock-names: 3962306a36Sopenharmony_ci items: 4062306a36Sopenharmony_ci - const: jpgdec-smi 4162306a36Sopenharmony_ci - const: jpgdec 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci power-domains: 4462306a36Sopenharmony_ci maxItems: 1 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_ci iommus: 4762306a36Sopenharmony_ci maxItems: 2 4862306a36Sopenharmony_ci description: | 4962306a36Sopenharmony_ci Points to the respective IOMMU block with master port as argument, see 5062306a36Sopenharmony_ci Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details. 5162306a36Sopenharmony_ci Ports are according to the HW. 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_cirequired: 5462306a36Sopenharmony_ci - compatible 5562306a36Sopenharmony_ci - reg 5662306a36Sopenharmony_ci - interrupts 5762306a36Sopenharmony_ci - clocks 5862306a36Sopenharmony_ci - clock-names 5962306a36Sopenharmony_ci - power-domains 6062306a36Sopenharmony_ci - iommus 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ciadditionalProperties: false 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ciexamples: 6562306a36Sopenharmony_ci - | 6662306a36Sopenharmony_ci #include <dt-bindings/clock/mt2701-clk.h> 6762306a36Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 6862306a36Sopenharmony_ci #include <dt-bindings/memory/mt2701-larb-port.h> 6962306a36Sopenharmony_ci #include <dt-bindings/power/mt2701-power.h> 7062306a36Sopenharmony_ci jpegdec: jpegdec@15004000 { 7162306a36Sopenharmony_ci compatible = "mediatek,mt2701-jpgdec"; 7262306a36Sopenharmony_ci reg = <0x15004000 0x1000>; 7362306a36Sopenharmony_ci interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>; 7462306a36Sopenharmony_ci clocks = <&imgsys CLK_IMG_JPGDEC_SMI>, 7562306a36Sopenharmony_ci <&imgsys CLK_IMG_JPGDEC>; 7662306a36Sopenharmony_ci clock-names = "jpgdec-smi", 7762306a36Sopenharmony_ci "jpgdec"; 7862306a36Sopenharmony_ci power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; 7962306a36Sopenharmony_ci iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>, 8062306a36Sopenharmony_ci <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>; 8162306a36Sopenharmony_ci }; 82