162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/media/mediatek,mdp3-rdma.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: MediaTek Read Direct Memory Access
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Matthias Brugger <matthias.bgg@gmail.com>
1162306a36Sopenharmony_ci  - Moudy Ho <moudy.ho@mediatek.com>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_cidescription: |
1462306a36Sopenharmony_ci  MediaTek Read Direct Memory Access(RDMA) component used to do read DMA.
1562306a36Sopenharmony_ci  It contains one line buffer to store the sufficient pixel data, and
1662306a36Sopenharmony_ci  must be siblings to the central MMSYS_CONFIG node.
1762306a36Sopenharmony_ci  For a description of the MMSYS_CONFIG binding, see
1862306a36Sopenharmony_ci  Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
1962306a36Sopenharmony_ci  for details.
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ciproperties:
2262306a36Sopenharmony_ci  compatible:
2362306a36Sopenharmony_ci    items:
2462306a36Sopenharmony_ci      - const: mediatek,mt8183-mdp3-rdma
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ci  reg:
2762306a36Sopenharmony_ci    maxItems: 1
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ci  mediatek,gce-client-reg:
3062306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/phandle-array
3162306a36Sopenharmony_ci    items:
3262306a36Sopenharmony_ci      items:
3362306a36Sopenharmony_ci        - description: phandle of GCE
3462306a36Sopenharmony_ci        - description: GCE subsys id
3562306a36Sopenharmony_ci        - description: register offset
3662306a36Sopenharmony_ci        - description: register size
3762306a36Sopenharmony_ci    description: The register of client driver can be configured by gce with
3862306a36Sopenharmony_ci      4 arguments defined in this property. Each GCE subsys id is mapping to
3962306a36Sopenharmony_ci      a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_ci  mediatek,gce-events:
4262306a36Sopenharmony_ci    description:
4362306a36Sopenharmony_ci      The event id which is mapping to the specific hardware event signal
4462306a36Sopenharmony_ci      to gce. The event id is defined in the gce header
4562306a36Sopenharmony_ci      include/dt-bindings/gce/<chip>-gce.h of each chips.
4662306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint32-array
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci  power-domains:
4962306a36Sopenharmony_ci    maxItems: 1
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_ci  clocks:
5262306a36Sopenharmony_ci    items:
5362306a36Sopenharmony_ci      - description: RDMA clock
5462306a36Sopenharmony_ci      - description: RSZ clock
5562306a36Sopenharmony_ci
5662306a36Sopenharmony_ci  iommus:
5762306a36Sopenharmony_ci    maxItems: 1
5862306a36Sopenharmony_ci
5962306a36Sopenharmony_ci  mboxes:
6062306a36Sopenharmony_ci    items:
6162306a36Sopenharmony_ci      - description: used for 1st data pipe from RDMA
6262306a36Sopenharmony_ci      - description: used for 2nd data pipe from RDMA
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_ci  '#dma-cells':
6562306a36Sopenharmony_ci    const: 1
6662306a36Sopenharmony_ci
6762306a36Sopenharmony_cirequired:
6862306a36Sopenharmony_ci  - compatible
6962306a36Sopenharmony_ci  - reg
7062306a36Sopenharmony_ci  - mediatek,gce-client-reg
7162306a36Sopenharmony_ci  - mediatek,gce-events
7262306a36Sopenharmony_ci  - power-domains
7362306a36Sopenharmony_ci  - clocks
7462306a36Sopenharmony_ci  - iommus
7562306a36Sopenharmony_ci  - mboxes
7662306a36Sopenharmony_ci  - '#dma-cells'
7762306a36Sopenharmony_ci
7862306a36Sopenharmony_ciadditionalProperties: false
7962306a36Sopenharmony_ci
8062306a36Sopenharmony_ciexamples:
8162306a36Sopenharmony_ci  - |
8262306a36Sopenharmony_ci    #include <dt-bindings/clock/mt8183-clk.h>
8362306a36Sopenharmony_ci    #include <dt-bindings/gce/mt8183-gce.h>
8462306a36Sopenharmony_ci    #include <dt-bindings/power/mt8183-power.h>
8562306a36Sopenharmony_ci    #include <dt-bindings/memory/mt8183-larb-port.h>
8662306a36Sopenharmony_ci
8762306a36Sopenharmony_ci    dma-controller@14001000 {
8862306a36Sopenharmony_ci        compatible = "mediatek,mt8183-mdp3-rdma";
8962306a36Sopenharmony_ci        reg = <0x14001000 0x1000>;
9062306a36Sopenharmony_ci        mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>;
9162306a36Sopenharmony_ci        mediatek,gce-events = <CMDQ_EVENT_MDP_RDMA0_SOF>,
9262306a36Sopenharmony_ci                              <CMDQ_EVENT_MDP_RDMA0_EOF>;
9362306a36Sopenharmony_ci        power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
9462306a36Sopenharmony_ci        clocks = <&mmsys CLK_MM_MDP_RDMA0>,
9562306a36Sopenharmony_ci                 <&mmsys CLK_MM_MDP_RSZ1>;
9662306a36Sopenharmony_ci        iommus = <&iommu>;
9762306a36Sopenharmony_ci        mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST>,
9862306a36Sopenharmony_ci                 <&gce 21 CMDQ_THR_PRIO_LOWEST>;
9962306a36Sopenharmony_ci        #dma-cells = <1>;
10062306a36Sopenharmony_ci    };
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