162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/media/i2c/toshiba,tc358746.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Toshiba TC358746 Parallel to MIPI CSI2 Bridge 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Marco Felsch <kernel@pengutronix.de> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: |- 1362306a36Sopenharmony_ci The Toshiba TC358746 converts a parallel video stream into a MIPI CSI-2 1462306a36Sopenharmony_ci stream. The direction can be either parallel-in -> csi-out or csi-in -> 1562306a36Sopenharmony_ci parallel-out The chip is programmable through I2C and SPI but the SPI 1662306a36Sopenharmony_ci interface is only supported in parallel-in -> csi-out mode. 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci Note that the current device tree bindings only support the 1962306a36Sopenharmony_ci parallel-in -> csi-out path. 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ciproperties: 2262306a36Sopenharmony_ci compatible: 2362306a36Sopenharmony_ci const: toshiba,tc358746 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci reg: 2662306a36Sopenharmony_ci maxItems: 1 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci clocks: 2962306a36Sopenharmony_ci description: 3062306a36Sopenharmony_ci The phandle to the reference clock source. This corresponds to the 3162306a36Sopenharmony_ci hardware pin REFCLK. 3262306a36Sopenharmony_ci maxItems: 1 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci clock-names: 3562306a36Sopenharmony_ci const: refclk 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci "#clock-cells": 3862306a36Sopenharmony_ci description: | 3962306a36Sopenharmony_ci The bridge can act as clock provider for the sensor. To enable this 4062306a36Sopenharmony_ci support #clock-cells must be specified. Attention if this feature is used 4162306a36Sopenharmony_ci then the mclk rate must be at least: (2 * link-frequency) / 8 4262306a36Sopenharmony_ci `------------------´ ^ 4362306a36Sopenharmony_ci internal PLL rate smallest possible 4462306a36Sopenharmony_ci mclk-div 4562306a36Sopenharmony_ci const: 0 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci clock-output-names: 4862306a36Sopenharmony_ci description: 4962306a36Sopenharmony_ci The clock name of the MCLK output, the default name is tc358746-mclk. 5062306a36Sopenharmony_ci maxItems: 1 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci vddc-supply: 5362306a36Sopenharmony_ci description: Digital core voltage supply, 1.2 volts 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci vddio-supply: 5662306a36Sopenharmony_ci description: Digital I/O voltage supply, 1.8 volts 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci vddmipi-supply: 5962306a36Sopenharmony_ci description: MIPI CSI phy voltage supply, 1.2 volts 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_ci reset-gpios: 6262306a36Sopenharmony_ci description: 6362306a36Sopenharmony_ci The phandle and specifier for the GPIO that controls the chip reset. 6462306a36Sopenharmony_ci This corresponds to the hardware pin RESX which is physically active low. 6562306a36Sopenharmony_ci maxItems: 1 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci ports: 6862306a36Sopenharmony_ci $ref: /schemas/graph.yaml#/properties/ports 6962306a36Sopenharmony_ci properties: 7062306a36Sopenharmony_ci port@0: 7162306a36Sopenharmony_ci $ref: /schemas/graph.yaml#/$defs/port-base 7262306a36Sopenharmony_ci unevaluatedProperties: false 7362306a36Sopenharmony_ci description: Input port 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_ci properties: 7662306a36Sopenharmony_ci endpoint: 7762306a36Sopenharmony_ci $ref: /schemas/media/video-interfaces.yaml# 7862306a36Sopenharmony_ci unevaluatedProperties: false 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci properties: 8162306a36Sopenharmony_ci hsync-active: true 8262306a36Sopenharmony_ci vsync-active: true 8362306a36Sopenharmony_ci bus-type: 8462306a36Sopenharmony_ci enum: [ 5, 6 ] 8562306a36Sopenharmony_ci 8662306a36Sopenharmony_ci required: 8762306a36Sopenharmony_ci - hsync-active 8862306a36Sopenharmony_ci - vsync-active 8962306a36Sopenharmony_ci - bus-type 9062306a36Sopenharmony_ci 9162306a36Sopenharmony_ci port@1: 9262306a36Sopenharmony_ci $ref: /schemas/graph.yaml#/$defs/port-base 9362306a36Sopenharmony_ci unevaluatedProperties: false 9462306a36Sopenharmony_ci description: Output port 9562306a36Sopenharmony_ci 9662306a36Sopenharmony_ci properties: 9762306a36Sopenharmony_ci endpoint: 9862306a36Sopenharmony_ci $ref: /schemas/media/video-interfaces.yaml# 9962306a36Sopenharmony_ci unevaluatedProperties: false 10062306a36Sopenharmony_ci 10162306a36Sopenharmony_ci properties: 10262306a36Sopenharmony_ci data-lanes: 10362306a36Sopenharmony_ci minItems: 1 10462306a36Sopenharmony_ci maxItems: 4 10562306a36Sopenharmony_ci 10662306a36Sopenharmony_ci clock-noncontinuous: true 10762306a36Sopenharmony_ci link-frequencies: true 10862306a36Sopenharmony_ci 10962306a36Sopenharmony_ci required: 11062306a36Sopenharmony_ci - data-lanes 11162306a36Sopenharmony_ci - link-frequencies 11262306a36Sopenharmony_ci 11362306a36Sopenharmony_ci required: 11462306a36Sopenharmony_ci - port@0 11562306a36Sopenharmony_ci - port@1 11662306a36Sopenharmony_ci 11762306a36Sopenharmony_cirequired: 11862306a36Sopenharmony_ci - compatible 11962306a36Sopenharmony_ci - reg 12062306a36Sopenharmony_ci - clocks 12162306a36Sopenharmony_ci - clock-names 12262306a36Sopenharmony_ci - vddc-supply 12362306a36Sopenharmony_ci - vddio-supply 12462306a36Sopenharmony_ci - vddmipi-supply 12562306a36Sopenharmony_ci - ports 12662306a36Sopenharmony_ci 12762306a36Sopenharmony_ciadditionalProperties: false 12862306a36Sopenharmony_ci 12962306a36Sopenharmony_ciexamples: 13062306a36Sopenharmony_ci - | 13162306a36Sopenharmony_ci #include <dt-bindings/gpio/gpio.h> 13262306a36Sopenharmony_ci 13362306a36Sopenharmony_ci i2c { 13462306a36Sopenharmony_ci #address-cells = <1>; 13562306a36Sopenharmony_ci #size-cells = <0>; 13662306a36Sopenharmony_ci 13762306a36Sopenharmony_ci csi-bridge@e { 13862306a36Sopenharmony_ci compatible = "toshiba,tc358746"; 13962306a36Sopenharmony_ci reg = <0xe>; 14062306a36Sopenharmony_ci 14162306a36Sopenharmony_ci clocks = <&refclk>; 14262306a36Sopenharmony_ci clock-names = "refclk"; 14362306a36Sopenharmony_ci 14462306a36Sopenharmony_ci reset-gpios = <&gpio 2 GPIO_ACTIVE_LOW>; 14562306a36Sopenharmony_ci 14662306a36Sopenharmony_ci vddc-supply = <&v1_2d>; 14762306a36Sopenharmony_ci vddio-supply = <&v1_8d>; 14862306a36Sopenharmony_ci vddmipi-supply = <&v1_2d>; 14962306a36Sopenharmony_ci 15062306a36Sopenharmony_ci /* sensor mclk provider */ 15162306a36Sopenharmony_ci #clock-cells = <0>; 15262306a36Sopenharmony_ci 15362306a36Sopenharmony_ci ports { 15462306a36Sopenharmony_ci #address-cells = <1>; 15562306a36Sopenharmony_ci #size-cells = <0>; 15662306a36Sopenharmony_ci 15762306a36Sopenharmony_ci /* Input */ 15862306a36Sopenharmony_ci port@0 { 15962306a36Sopenharmony_ci reg = <0>; 16062306a36Sopenharmony_ci tc358746_in: endpoint { 16162306a36Sopenharmony_ci remote-endpoint = <&sensor_out>; 16262306a36Sopenharmony_ci hsync-active = <0>; 16362306a36Sopenharmony_ci vsync-active = <0>; 16462306a36Sopenharmony_ci bus-type = <5>; 16562306a36Sopenharmony_ci }; 16662306a36Sopenharmony_ci }; 16762306a36Sopenharmony_ci 16862306a36Sopenharmony_ci /* Output */ 16962306a36Sopenharmony_ci port@1 { 17062306a36Sopenharmony_ci reg = <1>; 17162306a36Sopenharmony_ci tc358746_out: endpoint { 17262306a36Sopenharmony_ci remote-endpoint = <&mipi_csi2_in>; 17362306a36Sopenharmony_ci data-lanes = <1 2>; 17462306a36Sopenharmony_ci clock-noncontinuous; 17562306a36Sopenharmony_ci link-frequencies = /bits/ 64 <216000000>; 17662306a36Sopenharmony_ci }; 17762306a36Sopenharmony_ci }; 17862306a36Sopenharmony_ci }; 17962306a36Sopenharmony_ci }; 18062306a36Sopenharmony_ci }; 181