162306a36Sopenharmony_ciThe APM X-Gene SLIMpro mailbox is used to communicate messages between
262306a36Sopenharmony_cithe ARM64 processors and the Cortex M3 (dubbed SLIMpro). It uses a simple
362306a36Sopenharmony_ciinterrupt based door bell mechanism and can exchange simple messages using the
462306a36Sopenharmony_ciinternal registers.
562306a36Sopenharmony_ci
662306a36Sopenharmony_ciThere are total of 8 interrupts in this mailbox. Each used for an individual
762306a36Sopenharmony_cidoor bell (or mailbox channel).
862306a36Sopenharmony_ci
962306a36Sopenharmony_ciRequired properties:
1062306a36Sopenharmony_ci- compatible:	Should be as "apm,xgene-slimpro-mbox".
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ci- reg:		Contains the mailbox register address range.
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ci- interrupts:	8 interrupts must be from 0 to 7, interrupt 0 define the
1562306a36Sopenharmony_ci		the interrupt for mailbox channel 0 and interrupt 1 for
1662306a36Sopenharmony_ci		mailbox channel 1 and so likewise for the reminder.
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ci- #mbox-cells:	only one to specify the mailbox channel number.
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ciExample:
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ciMailbox Node:
2362306a36Sopenharmony_ci		mailbox: mailbox@10540000 {
2462306a36Sopenharmony_ci			compatible = "apm,xgene-slimpro-mbox";
2562306a36Sopenharmony_ci			reg = <0x0 0x10540000 0x0 0xa000>;
2662306a36Sopenharmony_ci			#mbox-cells = <1>;
2762306a36Sopenharmony_ci			interrupts =  	<0x0 0x0 0x4>,
2862306a36Sopenharmony_ci					<0x0 0x1 0x4>,
2962306a36Sopenharmony_ci					<0x0 0x2 0x4>,
3062306a36Sopenharmony_ci					<0x0 0x3 0x4>,
3162306a36Sopenharmony_ci					<0x0 0x4 0x4>,
3262306a36Sopenharmony_ci					<0x0 0x5 0x4>,
3362306a36Sopenharmony_ci					<0x0 0x6 0x4>,
3462306a36Sopenharmony_ci					<0x0 0x7 0x4>,
3562306a36Sopenharmony_ci		};
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