162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/mailbox/microchip,mpfs-mailbox.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) mailbox controller 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Conor Dooley <conor.dooley@microchip.com> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ciproperties: 1362306a36Sopenharmony_ci compatible: 1462306a36Sopenharmony_ci const: microchip,mpfs-mailbox 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci reg: 1762306a36Sopenharmony_ci oneOf: 1862306a36Sopenharmony_ci - items: 1962306a36Sopenharmony_ci - description: mailbox control & data registers 2062306a36Sopenharmony_ci - description: mailbox interrupt registers 2162306a36Sopenharmony_ci deprecated: true 2262306a36Sopenharmony_ci - items: 2362306a36Sopenharmony_ci - description: mailbox control registers 2462306a36Sopenharmony_ci - description: mailbox interrupt registers 2562306a36Sopenharmony_ci - description: mailbox data registers 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci interrupts: 2862306a36Sopenharmony_ci maxItems: 1 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci "#mbox-cells": 3162306a36Sopenharmony_ci const: 1 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_cirequired: 3462306a36Sopenharmony_ci - compatible 3562306a36Sopenharmony_ci - reg 3662306a36Sopenharmony_ci - interrupts 3762306a36Sopenharmony_ci - "#mbox-cells" 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ciadditionalProperties: false 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ciexamples: 4262306a36Sopenharmony_ci - | 4362306a36Sopenharmony_ci soc { 4462306a36Sopenharmony_ci #address-cells = <2>; 4562306a36Sopenharmony_ci #size-cells = <2>; 4662306a36Sopenharmony_ci mbox: mailbox@37020000 { 4762306a36Sopenharmony_ci compatible = "microchip,mpfs-mailbox"; 4862306a36Sopenharmony_ci reg = <0x0 0x37020000 0x0 0x58>, <0x0 0x2000318C 0x0 0x40>, 4962306a36Sopenharmony_ci <0x0 0x37020800 0x0 0x100>; 5062306a36Sopenharmony_ci interrupt-parent = <&L1>; 5162306a36Sopenharmony_ci interrupts = <96>; 5262306a36Sopenharmony_ci #mbox-cells = <1>; 5362306a36Sopenharmony_ci }; 5462306a36Sopenharmony_ci }; 55