162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/iommu/samsung,sysmmu.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Samsung Exynos IOMMU H/W, System MMU (System Memory Management Unit)
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Marek Szyprowski <m.szyprowski@samsung.com>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cidescription: |+
1362306a36Sopenharmony_ci  Samsung's Exynos architecture contains System MMUs that enables scattered
1462306a36Sopenharmony_ci  physical memory chunks visible as a contiguous region to DMA-capable peripheral
1562306a36Sopenharmony_ci  devices like MFC, FIMC, FIMD, GScaler, FIMC-IS and so forth.
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ci  System MMU is an IOMMU and supports identical translation table format to
1862306a36Sopenharmony_ci  ARMv7 translation tables with minimum set of page properties including access
1962306a36Sopenharmony_ci  permissions, shareability and security protection. In addition, System MMU has
2062306a36Sopenharmony_ci  another capabilities like L2 TLB or block-fetch buffers to minimize translation
2162306a36Sopenharmony_ci  latency.
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci  System MMUs are in many to one relation with peripheral devices, i.e. single
2462306a36Sopenharmony_ci  peripheral device might have multiple System MMUs (usually one for each bus
2562306a36Sopenharmony_ci  master), but one System MMU can handle transactions from only one peripheral
2662306a36Sopenharmony_ci  device. The relation between a System MMU and the peripheral device needs to be
2762306a36Sopenharmony_ci  defined in device node of the peripheral device.
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ci  MFC in all Exynos SoCs and FIMD, M2M Scalers and G2D in Exynos5420 has 2 System
3062306a36Sopenharmony_ci  MMUs.
3162306a36Sopenharmony_ci  * MFC has one System MMU on its left and right bus.
3262306a36Sopenharmony_ci  * FIMD in Exynos5420 has one System MMU for window 0 and 4, the other system MMU
3362306a36Sopenharmony_ci    for window 1, 2 and 3.
3462306a36Sopenharmony_ci  * M2M Scalers and G2D in Exynos5420 has one System MMU on the read channel and
3562306a36Sopenharmony_ci    the other System MMU on the write channel.
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci  For information on assigning System MMU controller to its peripheral devices,
3862306a36Sopenharmony_ci  see generic IOMMU bindings.
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ciproperties:
4162306a36Sopenharmony_ci  compatible:
4262306a36Sopenharmony_ci    const: samsung,exynos-sysmmu
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci  reg:
4562306a36Sopenharmony_ci    maxItems: 1
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci  interrupts:
4862306a36Sopenharmony_ci    maxItems: 1
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci  clocks:
5162306a36Sopenharmony_ci    minItems: 1
5262306a36Sopenharmony_ci    maxItems: 2
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ci  clock-names:
5562306a36Sopenharmony_ci    oneOf:
5662306a36Sopenharmony_ci      - items:
5762306a36Sopenharmony_ci          - const: sysmmu
5862306a36Sopenharmony_ci      - items:
5962306a36Sopenharmony_ci          - const: sysmmu
6062306a36Sopenharmony_ci          - const: master
6162306a36Sopenharmony_ci      - items:
6262306a36Sopenharmony_ci          - const: aclk
6362306a36Sopenharmony_ci          - const: pclk
6462306a36Sopenharmony_ci
6562306a36Sopenharmony_ci  "#iommu-cells":
6662306a36Sopenharmony_ci    const: 0
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ci  power-domains:
6962306a36Sopenharmony_ci    description: |
7062306a36Sopenharmony_ci      Required if the System MMU is needed to gate its power.
7162306a36Sopenharmony_ci      Please refer to the following document:
7262306a36Sopenharmony_ci      Documentation/devicetree/bindings/power/pd-samsung.yaml
7362306a36Sopenharmony_ci    maxItems: 1
7462306a36Sopenharmony_ci
7562306a36Sopenharmony_cirequired:
7662306a36Sopenharmony_ci  - compatible
7762306a36Sopenharmony_ci  - reg
7862306a36Sopenharmony_ci  - interrupts
7962306a36Sopenharmony_ci  - clocks
8062306a36Sopenharmony_ci  - clock-names
8162306a36Sopenharmony_ci  - "#iommu-cells"
8262306a36Sopenharmony_ci
8362306a36Sopenharmony_ciadditionalProperties: false
8462306a36Sopenharmony_ci
8562306a36Sopenharmony_ciexamples:
8662306a36Sopenharmony_ci  - |
8762306a36Sopenharmony_ci    #include <dt-bindings/clock/exynos5250.h>
8862306a36Sopenharmony_ci
8962306a36Sopenharmony_ci    sysmmu_gsc0: iommu@13e80000 {
9062306a36Sopenharmony_ci      compatible = "samsung,exynos-sysmmu";
9162306a36Sopenharmony_ci      reg = <0x13E80000 0x1000>;
9262306a36Sopenharmony_ci      interrupt-parent = <&combiner>;
9362306a36Sopenharmony_ci      interrupts = <2 0>;
9462306a36Sopenharmony_ci      clock-names = "sysmmu", "master";
9562306a36Sopenharmony_ci      clocks = <&clock CLK_SMMU_GSCL0>,
9662306a36Sopenharmony_ci               <&clock CLK_GSCL0>;
9762306a36Sopenharmony_ci      power-domains = <&pd_gsc>;
9862306a36Sopenharmony_ci      #iommu-cells = <0>;
9962306a36Sopenharmony_ci    };
100