162306a36Sopenharmony_ciOmap2/3 intc controller 262306a36Sopenharmony_ci 362306a36Sopenharmony_ciOn TI omap2 and 3 the intc interrupt controller can provide 462306a36Sopenharmony_ci96 or 128 IRQ signals to the ARM host depending on the SoC. 562306a36Sopenharmony_ci 662306a36Sopenharmony_ciRequired Properties: 762306a36Sopenharmony_ci- compatible: should be one of 862306a36Sopenharmony_ci "ti,omap2-intc" 962306a36Sopenharmony_ci "ti,omap3-intc" 1062306a36Sopenharmony_ci "ti,dm814-intc" 1162306a36Sopenharmony_ci "ti,dm816-intc" 1262306a36Sopenharmony_ci "ti,am33xx-intc" 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci- interrupt-controller : Identifies the node as an interrupt controller 1562306a36Sopenharmony_ci- #interrupt-cells : Specifies the number of cells needed to encode interrupt 1662306a36Sopenharmony_ci source, should be 1 for intc 1762306a36Sopenharmony_ci- interrupts: interrupt reference to primary interrupt controller 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ciPlease refer to interrupts.txt in this directory for details of the common 2062306a36Sopenharmony_ciInterrupt Controllers bindings used by client devices. 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ciExample: 2362306a36Sopenharmony_ci intc: interrupt-controller@48200000 { 2462306a36Sopenharmony_ci compatible = "ti,omap3-intc"; 2562306a36Sopenharmony_ci interrupt-controller; 2662306a36Sopenharmony_ci #interrupt-cells = <1>; 2762306a36Sopenharmony_ci reg = <0x48200000 0x1000>; 2862306a36Sopenharmony_ci }; 29