162306a36Sopenharmony_ciSynopsys DesignWare APB interrupt controller (dw_apb_ictl) 262306a36Sopenharmony_ci 362306a36Sopenharmony_ciSynopsys DesignWare provides interrupt controller IP for APB known as 462306a36Sopenharmony_cidw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with 562306a36Sopenharmony_ciAPB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt 662306a36Sopenharmony_cicontroller in some SoCs, e.g. Hisilicon SD5203. 762306a36Sopenharmony_ci 862306a36Sopenharmony_ciRequired properties: 962306a36Sopenharmony_ci- compatible: shall be "snps,dw-apb-ictl" 1062306a36Sopenharmony_ci- reg: physical base address of the controller and length of memory mapped 1162306a36Sopenharmony_ci region starting with ENABLE_LOW register 1262306a36Sopenharmony_ci- interrupt-controller: identifies the node as an interrupt controller 1362306a36Sopenharmony_ci- #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ciAdditional required property when it's used as secondary interrupt controller: 1662306a36Sopenharmony_ci- interrupts: interrupt reference to primary interrupt controller 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ciThe interrupt sources map to the corresponding bits in the interrupt 1962306a36Sopenharmony_ciregisters, i.e. 2062306a36Sopenharmony_ci- 0 maps to bit 0 of low interrupts, 2162306a36Sopenharmony_ci- 1 maps to bit 1 of low interrupts, 2262306a36Sopenharmony_ci- 32 maps to bit 0 of high interrupts, 2362306a36Sopenharmony_ci- 33 maps to bit 1 of high interrupts, 2462306a36Sopenharmony_ci- (optional) fast interrupts start at 64. 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ciExample: 2762306a36Sopenharmony_ci /* dw_apb_ictl is used as secondary interrupt controller */ 2862306a36Sopenharmony_ci aic: interrupt-controller@3000 { 2962306a36Sopenharmony_ci compatible = "snps,dw-apb-ictl"; 3062306a36Sopenharmony_ci reg = <0x3000 0xc00>; 3162306a36Sopenharmony_ci interrupt-controller; 3262306a36Sopenharmony_ci #interrupt-cells = <1>; 3362306a36Sopenharmony_ci interrupt-parent = <&gic>; 3462306a36Sopenharmony_ci interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 3562306a36Sopenharmony_ci }; 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci /* dw_apb_ictl is used as primary interrupt controller */ 3862306a36Sopenharmony_ci vic: interrupt-controller@10130000 { 3962306a36Sopenharmony_ci compatible = "snps,dw-apb-ictl"; 4062306a36Sopenharmony_ci reg = <0x10130000 0x1000>; 4162306a36Sopenharmony_ci interrupt-controller; 4262306a36Sopenharmony_ci #interrupt-cells = <1>; 4362306a36Sopenharmony_ci }; 44