162306a36Sopenharmony_ciOpen Multi-Processor Interrupt Controller 262306a36Sopenharmony_ci 362306a36Sopenharmony_ciRequired properties: 462306a36Sopenharmony_ci 562306a36Sopenharmony_ci- compatible : This should be "openrisc,ompic" 662306a36Sopenharmony_ci- reg : Specifies base physical address and size of the register space. The 762306a36Sopenharmony_ci size is based on the number of cores the controller has been configured 862306a36Sopenharmony_ci to handle, this should be set to 8 bytes per cpu core. 962306a36Sopenharmony_ci- interrupt-controller : Identifies the node as an interrupt controller. 1062306a36Sopenharmony_ci- #interrupt-cells : This should be set to 0 as this will not be an irq 1162306a36Sopenharmony_ci parent. 1262306a36Sopenharmony_ci- interrupts : Specifies the interrupt line to which the ompic is wired. 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ciExample: 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ciompic: interrupt-controller@98000000 { 1762306a36Sopenharmony_ci compatible = "openrisc,ompic"; 1862306a36Sopenharmony_ci reg = <0x98000000 16>; 1962306a36Sopenharmony_ci interrupt-controller; 2062306a36Sopenharmony_ci #interrupt-cells = <0>; 2162306a36Sopenharmony_ci interrupts = <1>; 2262306a36Sopenharmony_ci}; 23