162306a36Sopenharmony_ci* NXP LPC32xx MIC, SIC1 and SIC2 Interrupt Controllers 262306a36Sopenharmony_ci 362306a36Sopenharmony_ciRequired properties: 462306a36Sopenharmony_ci- compatible: "nxp,lpc3220-mic" or "nxp,lpc3220-sic". 562306a36Sopenharmony_ci- reg: should contain IC registers location and length. 662306a36Sopenharmony_ci- interrupt-controller: identifies the node as an interrupt controller. 762306a36Sopenharmony_ci- #interrupt-cells: the number of cells to define an interrupt, should be 2. 862306a36Sopenharmony_ci The first cell is the IRQ number, the second cell is used to specify 962306a36Sopenharmony_ci one of the supported IRQ types: 1062306a36Sopenharmony_ci IRQ_TYPE_EDGE_RISING = low-to-high edge triggered, 1162306a36Sopenharmony_ci IRQ_TYPE_EDGE_FALLING = high-to-low edge triggered, 1262306a36Sopenharmony_ci IRQ_TYPE_LEVEL_HIGH = active high level-sensitive, 1362306a36Sopenharmony_ci IRQ_TYPE_LEVEL_LOW = active low level-sensitive. 1462306a36Sopenharmony_ci Reset value is IRQ_TYPE_LEVEL_LOW. 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ciOptional properties: 1762306a36Sopenharmony_ci- interrupts: empty for MIC interrupt controller, cascaded MIC 1862306a36Sopenharmony_ci hardware interrupts for SIC1 and SIC2 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ciExamples: 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci /* LPC32xx MIC, SIC1 and SIC2 interrupt controllers */ 2362306a36Sopenharmony_ci mic: interrupt-controller@40008000 { 2462306a36Sopenharmony_ci compatible = "nxp,lpc3220-mic"; 2562306a36Sopenharmony_ci reg = <0x40008000 0x4000>; 2662306a36Sopenharmony_ci interrupt-controller; 2762306a36Sopenharmony_ci #interrupt-cells = <2>; 2862306a36Sopenharmony_ci }; 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci sic1: interrupt-controller@4000c000 { 3162306a36Sopenharmony_ci compatible = "nxp,lpc3220-sic"; 3262306a36Sopenharmony_ci reg = <0x4000c000 0x4000>; 3362306a36Sopenharmony_ci interrupt-controller; 3462306a36Sopenharmony_ci #interrupt-cells = <2>; 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ci interrupt-parent = <&mic>; 3762306a36Sopenharmony_ci interrupts = <0 IRQ_TYPE_LEVEL_LOW>, 3862306a36Sopenharmony_ci <30 IRQ_TYPE_LEVEL_LOW>; 3962306a36Sopenharmony_ci }; 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci sic2: interrupt-controller@40010000 { 4262306a36Sopenharmony_ci compatible = "nxp,lpc3220-sic"; 4362306a36Sopenharmony_ci reg = <0x40010000 0x4000>; 4462306a36Sopenharmony_ci interrupt-controller; 4562306a36Sopenharmony_ci #interrupt-cells = <2>; 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci interrupt-parent = <&mic>; 4862306a36Sopenharmony_ci interrupts = <1 IRQ_TYPE_LEVEL_LOW>, 4962306a36Sopenharmony_ci <31 IRQ_TYPE_LEVEL_LOW>; 5062306a36Sopenharmony_ci }; 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci /* ADC */ 5362306a36Sopenharmony_ci adc@40048000 { 5462306a36Sopenharmony_ci compatible = "nxp,lpc3220-adc"; 5562306a36Sopenharmony_ci reg = <0x40048000 0x1000>; 5662306a36Sopenharmony_ci interrupt-parent = <&sic1>; 5762306a36Sopenharmony_ci interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; 5862306a36Sopenharmony_ci }; 59