162306a36Sopenharmony_ciNVIDIA Legacy Interrupt Controller 262306a36Sopenharmony_ci 362306a36Sopenharmony_ciAll Tegra SoCs contain a legacy interrupt controller that routes 462306a36Sopenharmony_ciinterrupts to the GIC, and also serves as a wakeup source. It is also 562306a36Sopenharmony_cireferred to as "ictlr", hence the name of the binding. 662306a36Sopenharmony_ci 762306a36Sopenharmony_ciThe HW block exposes a number of interrupt controllers, each 862306a36Sopenharmony_ciimplementing a set of 32 interrupts. 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ciRequired properties: 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci- compatible : should be: "nvidia,tegra<chip>-ictlr". The LIC on 1362306a36Sopenharmony_ci subsequent SoCs remained backwards-compatible with Tegra30, so on 1462306a36Sopenharmony_ci Tegra generations later than Tegra30 the compatible value should 1562306a36Sopenharmony_ci include "nvidia,tegra30-ictlr". 1662306a36Sopenharmony_ci- reg : Specifies base physical address and size of the registers. 1762306a36Sopenharmony_ci Each controller must be described separately (Tegra20 has 4 of them, 1862306a36Sopenharmony_ci whereas Tegra30 and later have 5). 1962306a36Sopenharmony_ci- interrupt-controller : Identifies the node as an interrupt controller. 2062306a36Sopenharmony_ci- #interrupt-cells : Specifies the number of cells needed to encode an 2162306a36Sopenharmony_ci interrupt source. The value must be 3. 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ciNotes: 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci- Because this HW ultimately routes interrupts to the GIC, the 2662306a36Sopenharmony_ci interrupt specifier must be that of the GIC. 2762306a36Sopenharmony_ci- Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs 2862306a36Sopenharmony_ci are explicitly forbidden. 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ciExample: 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci ictlr: interrupt-controller@60004000 { 3362306a36Sopenharmony_ci compatible = "nvidia,tegra20-ictlr", "nvidia,tegra-ictlr"; 3462306a36Sopenharmony_ci reg = <0x60004000 64>, 3562306a36Sopenharmony_ci <0x60004100 64>, 3662306a36Sopenharmony_ci <0x60004200 64>, 3762306a36Sopenharmony_ci <0x60004300 64>; 3862306a36Sopenharmony_ci interrupt-controller; 3962306a36Sopenharmony_ci #interrupt-cells = <3>; 4062306a36Sopenharmony_ci interrupt-parent = <&intc>; 4162306a36Sopenharmony_ci }; 42