162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/interrupt-controller/mstar,mst-intc.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: MStar Interrupt Controller 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Mark-PK Tsai <mark-pk.tsai@mediatek.com> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: |+ 1362306a36Sopenharmony_ci MStar, SigmaStar and Mediatek TV SoCs contain multiple legacy 1462306a36Sopenharmony_ci interrupt controllers that routes interrupts to the GIC. 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci The HW block exposes a number of interrupt controllers, each 1762306a36Sopenharmony_ci can support up to 64 interrupts. 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ciproperties: 2062306a36Sopenharmony_ci compatible: 2162306a36Sopenharmony_ci const: mstar,mst-intc 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci interrupt-controller: true 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci "#interrupt-cells": 2662306a36Sopenharmony_ci const: 3 2762306a36Sopenharmony_ci description: | 2862306a36Sopenharmony_ci Use the same format as specified by GIC in arm,gic.yaml. 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci reg: 3162306a36Sopenharmony_ci maxItems: 1 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci mstar,irqs-map-range: 3462306a36Sopenharmony_ci description: | 3562306a36Sopenharmony_ci The range <start, end> of parent interrupt controller's interrupt 3662306a36Sopenharmony_ci lines that are hardwired to mstar interrupt controller. 3762306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32-matrix 3862306a36Sopenharmony_ci items: 3962306a36Sopenharmony_ci minItems: 2 4062306a36Sopenharmony_ci maxItems: 2 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci mstar,intc-no-eoi: 4362306a36Sopenharmony_ci description: 4462306a36Sopenharmony_ci Mark this controller has no End Of Interrupt(EOI) implementation. 4562306a36Sopenharmony_ci type: boolean 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_cirequired: 4862306a36Sopenharmony_ci - compatible 4962306a36Sopenharmony_ci - reg 5062306a36Sopenharmony_ci - mstar,irqs-map-range 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ciadditionalProperties: false 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ciexamples: 5562306a36Sopenharmony_ci - | 5662306a36Sopenharmony_ci mst_intc0: interrupt-controller@1f2032d0 { 5762306a36Sopenharmony_ci compatible = "mstar,mst-intc"; 5862306a36Sopenharmony_ci interrupt-controller; 5962306a36Sopenharmony_ci #interrupt-cells = <3>; 6062306a36Sopenharmony_ci interrupt-parent = <&gic>; 6162306a36Sopenharmony_ci reg = <0x1f2032d0 0x30>; 6262306a36Sopenharmony_ci mstar,irqs-map-range = <0 63>; 6362306a36Sopenharmony_ci }; 6462306a36Sopenharmony_ci... 65