162306a36Sopenharmony_ciThis document describes the generic device tree binding for MSI controllers and 262306a36Sopenharmony_citheir master(s). 362306a36Sopenharmony_ci 462306a36Sopenharmony_ciMessage Signaled Interrupts (MSIs) are a class of interrupts generated by a 562306a36Sopenharmony_ciwrite to an MMIO address. 662306a36Sopenharmony_ci 762306a36Sopenharmony_ciMSIs were originally specified by PCI (and are used with PCIe), but may also be 862306a36Sopenharmony_ciused with other busses, and hence a mechanism is required to relate devices on 962306a36Sopenharmony_cithose busses to the MSI controllers which they are capable of using, 1062306a36Sopenharmony_cipotentially including additional information. 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ciMSIs are distinguished by some combination of: 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci- The doorbell (the MMIO address written to). 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci Devices may be configured by software to write to arbitrary doorbells which 1762306a36Sopenharmony_ci they can address. An MSI controller may feature a number of doorbells. 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci- The payload (the value written to the doorbell). 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci Devices may be configured to write an arbitrary payload chosen by software. 2262306a36Sopenharmony_ci MSI controllers may have restrictions on permitted payloads. 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci- Sideband information accompanying the write. 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci Typically this is neither configurable nor probeable, and depends on the path 2762306a36Sopenharmony_ci taken through the memory system (i.e. it is a property of the combination of 2862306a36Sopenharmony_ci MSI controller and device rather than a property of either in isolation). 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ciMSI controllers: 3262306a36Sopenharmony_ci================ 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ciAn MSI controller signals interrupts to a CPU when a write is made to an MMIO 3562306a36Sopenharmony_ciaddress by some master. An MSI controller may feature a number of doorbells. 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ciRequired properties: 3862306a36Sopenharmony_ci-------------------- 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ci- msi-controller: Identifies the node as an MSI controller. 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ciOptional properties: 4362306a36Sopenharmony_ci-------------------- 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci- #msi-cells: The number of cells in an msi-specifier, required if not zero. 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci Typically this will encode information related to sideband data, and will 4862306a36Sopenharmony_ci not encode doorbells or payloads as these can be configured dynamically. 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci The meaning of the msi-specifier is defined by the device tree binding of 5162306a36Sopenharmony_ci the specific MSI controller. 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ciMSI clients 5562306a36Sopenharmony_ci=========== 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_ciMSI clients are devices which generate MSIs. For each MSI they wish to 5862306a36Sopenharmony_cigenerate, the doorbell and payload may be configured, though sideband 5962306a36Sopenharmony_ciinformation may not be configurable. 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_ciRequired properties: 6262306a36Sopenharmony_ci-------------------- 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci- msi-parent: A list of phandle + msi-specifier pairs, one for each MSI 6562306a36Sopenharmony_ci controller which the device is capable of using. 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci This property is unordered, and MSIs may be allocated from any combination of 6862306a36Sopenharmony_ci MSI controllers listed in the msi-parent property. 6962306a36Sopenharmony_ci 7062306a36Sopenharmony_ci If a device has restrictions on the allocation of MSIs, these restrictions 7162306a36Sopenharmony_ci must be described with additional properties. 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_ci When #msi-cells is non-zero, busses with an msi-parent will require 7462306a36Sopenharmony_ci additional properties to describe the relationship between devices on the bus 7562306a36Sopenharmony_ci and the set of MSIs they can potentially generate. 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_ci 7862306a36Sopenharmony_ciExample 7962306a36Sopenharmony_ci======= 8062306a36Sopenharmony_ci 8162306a36Sopenharmony_ci/ { 8262306a36Sopenharmony_ci #address-cells = <1>; 8362306a36Sopenharmony_ci #size-cells = <1>; 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_ci msi_a: msi-controller@a { 8662306a36Sopenharmony_ci reg = <0xa 0xf00>; 8762306a36Sopenharmony_ci compatible = "vendor-a,some-controller"; 8862306a36Sopenharmony_ci msi-controller; 8962306a36Sopenharmony_ci /* No sideband data, so #msi-cells omitted */ 9062306a36Sopenharmony_ci }; 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_ci msi_b: msi-controller@b { 9362306a36Sopenharmony_ci reg = <0xb 0xf00>; 9462306a36Sopenharmony_ci compatible = "vendor-b,another-controller"; 9562306a36Sopenharmony_ci msi-controller; 9662306a36Sopenharmony_ci /* Each device has some unique ID */ 9762306a36Sopenharmony_ci #msi-cells = <1>; 9862306a36Sopenharmony_ci }; 9962306a36Sopenharmony_ci 10062306a36Sopenharmony_ci msi_c: msi-controller@c { 10162306a36Sopenharmony_ci reg = <0xc 0xf00>; 10262306a36Sopenharmony_ci compatible = "vendor-b,another-controller"; 10362306a36Sopenharmony_ci msi-controller; 10462306a36Sopenharmony_ci /* Each device has some unique ID */ 10562306a36Sopenharmony_ci #msi-cells = <1>; 10662306a36Sopenharmony_ci }; 10762306a36Sopenharmony_ci 10862306a36Sopenharmony_ci dev@0 { 10962306a36Sopenharmony_ci reg = <0x0 0xf00>; 11062306a36Sopenharmony_ci compatible = "vendor-c,some-device"; 11162306a36Sopenharmony_ci 11262306a36Sopenharmony_ci /* Can only generate MSIs to msi_a */ 11362306a36Sopenharmony_ci msi-parent = <&msi_a>; 11462306a36Sopenharmony_ci }; 11562306a36Sopenharmony_ci 11662306a36Sopenharmony_ci dev@1 { 11762306a36Sopenharmony_ci reg = <0x1 0xf00>; 11862306a36Sopenharmony_ci compatible = "vendor-c,some-device"; 11962306a36Sopenharmony_ci 12062306a36Sopenharmony_ci /* 12162306a36Sopenharmony_ci * Can generate MSIs to either A or B. 12262306a36Sopenharmony_ci */ 12362306a36Sopenharmony_ci msi-parent = <&msi_a>, <&msi_b 0x17>; 12462306a36Sopenharmony_ci }; 12562306a36Sopenharmony_ci 12662306a36Sopenharmony_ci dev@2 { 12762306a36Sopenharmony_ci reg = <0x2 0xf00>; 12862306a36Sopenharmony_ci compatible = "vendor-c,some-device"; 12962306a36Sopenharmony_ci /* 13062306a36Sopenharmony_ci * Has different IDs at each MSI controller. 13162306a36Sopenharmony_ci * Can generate MSIs to all of the MSI controllers. 13262306a36Sopenharmony_ci */ 13362306a36Sopenharmony_ci msi-parent = <&msi_a>, <&msi_b 0x17>, <&msi_c 0x53>; 13462306a36Sopenharmony_ci }; 13562306a36Sopenharmony_ci}; 136