162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/interrupt-controller/microchip,sama7g5-eic.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Microchip External Interrupt Controller 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Claudiu Beznea <claudiu.beznea@microchip.com> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: 1362306a36Sopenharmony_ci This interrupt controller is found in Microchip SoCs (SAMA7G5) and provides 1462306a36Sopenharmony_ci support for handling up to 2 external interrupt lines. 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ciproperties: 1762306a36Sopenharmony_ci compatible: 1862306a36Sopenharmony_ci enum: 1962306a36Sopenharmony_ci - microchip,sama7g5-eic 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci reg: 2262306a36Sopenharmony_ci maxItems: 1 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci interrupt-controller: true 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci '#interrupt-cells': 2762306a36Sopenharmony_ci const: 2 2862306a36Sopenharmony_ci description: 2962306a36Sopenharmony_ci The first cell is the input IRQ number (between 0 and 1), the second cell 3062306a36Sopenharmony_ci is the trigger type as defined in interrupt.txt present in this directory. 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci interrupts: 3362306a36Sopenharmony_ci description: | 3462306a36Sopenharmony_ci Contains the GIC SPI IRQs mapped to the external interrupt lines. They 3562306a36Sopenharmony_ci should be specified sequentially from output 0 to output 1. 3662306a36Sopenharmony_ci minItems: 2 3762306a36Sopenharmony_ci maxItems: 2 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci clocks: 4062306a36Sopenharmony_ci maxItems: 1 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci clock-names: 4362306a36Sopenharmony_ci const: pclk 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_cirequired: 4662306a36Sopenharmony_ci - compatible 4762306a36Sopenharmony_ci - reg 4862306a36Sopenharmony_ci - interrupt-controller 4962306a36Sopenharmony_ci - '#interrupt-cells' 5062306a36Sopenharmony_ci - interrupts 5162306a36Sopenharmony_ci - clocks 5262306a36Sopenharmony_ci - clock-names 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ciadditionalProperties: false 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ciexamples: 5762306a36Sopenharmony_ci - | 5862306a36Sopenharmony_ci #include <dt-bindings/clock/at91.h> 5962306a36Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_ci eic: interrupt-controller@e1628000 { 6262306a36Sopenharmony_ci compatible = "microchip,sama7g5-eic"; 6362306a36Sopenharmony_ci reg = <0xe1628000 0x100>; 6462306a36Sopenharmony_ci interrupt-parent = <&gic>; 6562306a36Sopenharmony_ci interrupt-controller; 6662306a36Sopenharmony_ci #interrupt-cells = <2>; 6762306a36Sopenharmony_ci interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, 6862306a36Sopenharmony_ci <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 6962306a36Sopenharmony_ci clocks = <&pmc PMC_TYPE_PERIPHERAL 37>; 7062306a36Sopenharmony_ci clock-names = "pclk"; 7162306a36Sopenharmony_ci }; 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_ci... 74