162306a36Sopenharmony_ciMarvell Armada 7K/8K PIC Interrupt controller 262306a36Sopenharmony_ci--------------------------------------------- 362306a36Sopenharmony_ci 462306a36Sopenharmony_ciThis is the Device Tree binding for the PIC, a secondary interrupt 562306a36Sopenharmony_cicontroller available on the Marvell Armada 7K/8K ARM64 SoCs, and 662306a36Sopenharmony_citypically connected to the GIC as the primary interrupt controller. 762306a36Sopenharmony_ci 862306a36Sopenharmony_ciRequired properties: 962306a36Sopenharmony_ci- compatible: should be "marvell,armada-8k-pic" 1062306a36Sopenharmony_ci- interrupt-controller: identifies the node as an interrupt controller 1162306a36Sopenharmony_ci- #interrupt-cells: the number of cells to define interrupts on this 1262306a36Sopenharmony_ci controller. Should be 1 1362306a36Sopenharmony_ci- reg: the register area for the PIC interrupt controller 1462306a36Sopenharmony_ci- interrupts: the interrupt to the primary interrupt controller, 1562306a36Sopenharmony_ci typically the GIC 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ciExample: 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci pic: interrupt-controller@3f0100 { 2062306a36Sopenharmony_ci compatible = "marvell,armada-8k-pic"; 2162306a36Sopenharmony_ci reg = <0x3f0100 0x10>; 2262306a36Sopenharmony_ci #interrupt-cells = <1>; 2362306a36Sopenharmony_ci interrupt-controller; 2462306a36Sopenharmony_ci interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>; 2562306a36Sopenharmony_ci }; 26