162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Loongson Local I/O Interrupt Controller
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Jiaxun Yang <jiaxun.yang@flygoat.com>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cidescription: |
1362306a36Sopenharmony_ci  This interrupt controller is found in the Loongson-3 family of chips and
1462306a36Sopenharmony_ci  Loongson-2K1000 chip, as the primary package interrupt controller which
1562306a36Sopenharmony_ci  can route local I/O interrupt to interrupt lines of cores.
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ciallOf:
1862306a36Sopenharmony_ci  - $ref: /schemas/interrupt-controller.yaml#
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ciproperties:
2162306a36Sopenharmony_ci  compatible:
2262306a36Sopenharmony_ci    enum:
2362306a36Sopenharmony_ci      - loongson,liointc-1.0
2462306a36Sopenharmony_ci      - loongson,liointc-1.0a
2562306a36Sopenharmony_ci      - loongson,liointc-2.0
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci  reg:
2862306a36Sopenharmony_ci    minItems: 1
2962306a36Sopenharmony_ci    maxItems: 3
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci  reg-names:
3262306a36Sopenharmony_ci    items:
3362306a36Sopenharmony_ci      - const: main
3462306a36Sopenharmony_ci      - const: isr0
3562306a36Sopenharmony_ci      - const: isr1
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci  interrupt-controller: true
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci  interrupts:
4062306a36Sopenharmony_ci    description:
4162306a36Sopenharmony_ci      Interrupt source of the CPU interrupts.
4262306a36Sopenharmony_ci    minItems: 1
4362306a36Sopenharmony_ci    maxItems: 4
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci  interrupt-names:
4662306a36Sopenharmony_ci    description: List of names for the parent interrupts.
4762306a36Sopenharmony_ci    items:
4862306a36Sopenharmony_ci      - const: int0
4962306a36Sopenharmony_ci      - const: int1
5062306a36Sopenharmony_ci      - const: int2
5162306a36Sopenharmony_ci      - const: int3
5262306a36Sopenharmony_ci    minItems: 1
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ci  '#interrupt-cells':
5562306a36Sopenharmony_ci    const: 2
5662306a36Sopenharmony_ci
5762306a36Sopenharmony_ci  loongson,parent_int_map:
5862306a36Sopenharmony_ci    description: |
5962306a36Sopenharmony_ci      This property points how the children interrupts will be mapped into CPU
6062306a36Sopenharmony_ci      interrupt lines. Each cell refers to a parent interrupt line from 0 to 3
6162306a36Sopenharmony_ci      and each bit in the cell refers to a child interrupt from 0 to 31.
6262306a36Sopenharmony_ci      If a CPU interrupt line didn't connect with liointc, then keep its
6362306a36Sopenharmony_ci      cell with zero.
6462306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint32-array
6562306a36Sopenharmony_ci    minItems: 4
6662306a36Sopenharmony_ci    maxItems: 4
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_cirequired:
6962306a36Sopenharmony_ci  - compatible
7062306a36Sopenharmony_ci  - reg
7162306a36Sopenharmony_ci  - interrupts
7262306a36Sopenharmony_ci  - interrupt-controller
7362306a36Sopenharmony_ci  - '#interrupt-cells'
7462306a36Sopenharmony_ci  - loongson,parent_int_map
7562306a36Sopenharmony_ci
7662306a36Sopenharmony_ci
7762306a36Sopenharmony_ciunevaluatedProperties: false
7862306a36Sopenharmony_ci
7962306a36Sopenharmony_ciif:
8062306a36Sopenharmony_ci  properties:
8162306a36Sopenharmony_ci    compatible:
8262306a36Sopenharmony_ci      contains:
8362306a36Sopenharmony_ci        enum:
8462306a36Sopenharmony_ci          - loongson,liointc-2.0
8562306a36Sopenharmony_ci
8662306a36Sopenharmony_cithen:
8762306a36Sopenharmony_ci  properties:
8862306a36Sopenharmony_ci    reg:
8962306a36Sopenharmony_ci      minItems: 3
9062306a36Sopenharmony_ci
9162306a36Sopenharmony_ci  required:
9262306a36Sopenharmony_ci    - reg-names
9362306a36Sopenharmony_ci
9462306a36Sopenharmony_cielse:
9562306a36Sopenharmony_ci  properties:
9662306a36Sopenharmony_ci    reg:
9762306a36Sopenharmony_ci      maxItems: 1
9862306a36Sopenharmony_ci
9962306a36Sopenharmony_ciexamples:
10062306a36Sopenharmony_ci  - |
10162306a36Sopenharmony_ci    iointc: interrupt-controller@3ff01400 {
10262306a36Sopenharmony_ci      compatible = "loongson,liointc-1.0";
10362306a36Sopenharmony_ci      reg = <0x3ff01400 0x64>;
10462306a36Sopenharmony_ci
10562306a36Sopenharmony_ci      interrupt-controller;
10662306a36Sopenharmony_ci      #interrupt-cells = <2>;
10762306a36Sopenharmony_ci
10862306a36Sopenharmony_ci      interrupt-parent = <&cpuintc>;
10962306a36Sopenharmony_ci      interrupts = <2>, <3>;
11062306a36Sopenharmony_ci      interrupt-names = "int0", "int1";
11162306a36Sopenharmony_ci
11262306a36Sopenharmony_ci      loongson,parent_int_map = <0xf0ffffff>, /* int0 */
11362306a36Sopenharmony_ci                                <0x0f000000>, /* int1 */
11462306a36Sopenharmony_ci                                <0x00000000>, /* int2 */
11562306a36Sopenharmony_ci                                <0x00000000>; /* int3 */
11662306a36Sopenharmony_ci
11762306a36Sopenharmony_ci    };
11862306a36Sopenharmony_ci
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