162306a36Sopenharmony_ciBCM2836 per-CPU interrupt controller 262306a36Sopenharmony_ci 362306a36Sopenharmony_ciThe BCM2836 has a per-cpu interrupt controller for the timer, PMU 462306a36Sopenharmony_cievents, and SMP IPIs. One of the CPUs may receive interrupts for the 562306a36Sopenharmony_ciperipheral (GPU) events, which chain to the BCM2835-style interrupt 662306a36Sopenharmony_cicontroller. 762306a36Sopenharmony_ci 862306a36Sopenharmony_ciRequired properties: 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci- compatible: Should be "brcm,bcm2836-l1-intc" 1162306a36Sopenharmony_ci- reg: Specifies base physical address and size of the 1262306a36Sopenharmony_ci registers 1362306a36Sopenharmony_ci- interrupt-controller: Identifies the node as an interrupt controller 1462306a36Sopenharmony_ci- #interrupt-cells: Specifies the number of cells needed to encode an 1562306a36Sopenharmony_ci interrupt source. The value shall be 2 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ciPlease refer to interrupts.txt in this directory for details of the common 1862306a36Sopenharmony_ciInterrupt Controllers bindings used by client devices. 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ciThe interrupt sources are as follows: 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci0: CNTPSIRQ 2362306a36Sopenharmony_ci1: CNTPNSIRQ 2462306a36Sopenharmony_ci2: CNTHPIRQ 2562306a36Sopenharmony_ci3: CNTVIRQ 2662306a36Sopenharmony_ci8: GPU_FAST 2762306a36Sopenharmony_ci9: PMU_FAST 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ciExample: 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_cilocal_intc: local_intc { 3262306a36Sopenharmony_ci compatible = "brcm,bcm2836-l1-intc"; 3362306a36Sopenharmony_ci reg = <0x40000000 0x100>; 3462306a36Sopenharmony_ci interrupt-controller; 3562306a36Sopenharmony_ci #interrupt-cells = <2>; 3662306a36Sopenharmony_ci interrupt-parent = <&local_intc>; 3762306a36Sopenharmony_ci}; 38