162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/interrupt-controller/actions,owl-sirq.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Actions Semi Owl SoCs SIRQ interrupt controller 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 1162306a36Sopenharmony_ci - Cristian Ciocaltea <cristian.ciocaltea@gmail.com> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_cidescription: | 1462306a36Sopenharmony_ci This interrupt controller is found in the Actions Semi Owl SoCs (S500, S700 1562306a36Sopenharmony_ci and S900) and provides support for handling up to 3 external interrupt lines. 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ciproperties: 1862306a36Sopenharmony_ci compatible: 1962306a36Sopenharmony_ci enum: 2062306a36Sopenharmony_ci - actions,s500-sirq 2162306a36Sopenharmony_ci - actions,s700-sirq 2262306a36Sopenharmony_ci - actions,s900-sirq 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci reg: 2562306a36Sopenharmony_ci maxItems: 1 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci interrupt-controller: true 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci '#interrupt-cells': 3062306a36Sopenharmony_ci const: 2 3162306a36Sopenharmony_ci description: 3262306a36Sopenharmony_ci The first cell is the input IRQ number, between 0 and 2, while the second 3362306a36Sopenharmony_ci cell is the trigger type as defined in interrupt.txt in this directory. 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci interrupts: 3662306a36Sopenharmony_ci description: | 3762306a36Sopenharmony_ci Contains the GIC SPI IRQs mapped to the external interrupt lines. 3862306a36Sopenharmony_ci They shall be specified sequentially from output 0 to 2. 3962306a36Sopenharmony_ci minItems: 3 4062306a36Sopenharmony_ci maxItems: 3 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_cirequired: 4362306a36Sopenharmony_ci - compatible 4462306a36Sopenharmony_ci - reg 4562306a36Sopenharmony_ci - interrupt-controller 4662306a36Sopenharmony_ci - '#interrupt-cells' 4762306a36Sopenharmony_ci - interrupts 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ciadditionalProperties: false 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ciexamples: 5262306a36Sopenharmony_ci - | 5362306a36Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci sirq: interrupt-controller@b01b0200 { 5662306a36Sopenharmony_ci compatible = "actions,s500-sirq"; 5762306a36Sopenharmony_ci reg = <0xb01b0200 0x4>; 5862306a36Sopenharmony_ci interrupt-controller; 5962306a36Sopenharmony_ci #interrupt-cells = <2>; 6062306a36Sopenharmony_ci interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, /* SIRQ0 */ 6162306a36Sopenharmony_ci <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, /* SIRQ1 */ 6262306a36Sopenharmony_ci <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; /* SIRQ2 */ 6362306a36Sopenharmony_ci }; 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci... 66