162306a36Sopenharmony_ciCE4100 I2C 262306a36Sopenharmony_ci---------- 362306a36Sopenharmony_ci 462306a36Sopenharmony_ciCE4100 has one PCI device which is described as the I2C-Controller. This 562306a36Sopenharmony_ciPCI device has three PCI-bars, each bar contains a complete I2C 662306a36Sopenharmony_cicontroller. So we have a total of three independent I2C-Controllers 762306a36Sopenharmony_ciwhich share only an interrupt line. 862306a36Sopenharmony_ciThe driver is probed via the PCI-ID and is gathering the information of 962306a36Sopenharmony_ciattached devices from the devices tree. 1062306a36Sopenharmony_ciGrant Likely recommended to use the ranges property to map the PCI-Bar 1162306a36Sopenharmony_cinumber to its physical address and to use this to find the child nodes 1262306a36Sopenharmony_ciof the specific I2C controller. This were his exact words: 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci Here's where the magic happens. Each entry in 1562306a36Sopenharmony_ci ranges describes how the parent pci address space 1662306a36Sopenharmony_ci (middle group of 3) is translated to the local 1762306a36Sopenharmony_ci address space (first group of 2) and the size of 1862306a36Sopenharmony_ci each range (last cell). In this particular case, 1962306a36Sopenharmony_ci the first cell of the local address is chosen to be 2062306a36Sopenharmony_ci 1:1 mapped to the BARs, and the second is the 2162306a36Sopenharmony_ci offset from be base of the BAR (which would be 2262306a36Sopenharmony_ci non-zero if you had 2 or more devices mapped off 2362306a36Sopenharmony_ci the same BAR) 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci ranges allows the address mapping to be described 2662306a36Sopenharmony_ci in a way that the OS can interpret without 2762306a36Sopenharmony_ci requiring custom device driver code. 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ciThis is an example which is used on FalconFalls: 3062306a36Sopenharmony_ci------------------------------------------------ 3162306a36Sopenharmony_ci i2c-controller@b,2 { 3262306a36Sopenharmony_ci #address-cells = <2>; 3362306a36Sopenharmony_ci #size-cells = <1>; 3462306a36Sopenharmony_ci compatible = "pci8086,2e68.2", 3562306a36Sopenharmony_ci "pci8086,2e68", 3662306a36Sopenharmony_ci "pciclass,ff0000", 3762306a36Sopenharmony_ci "pciclass,ff00"; 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci reg = <0x15a00 0x0 0x0 0x0 0x0>; 4062306a36Sopenharmony_ci interrupts = <16 1>; 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci /* as described by Grant, the first number in the group of 4362306a36Sopenharmony_ci * three is the bar number followed by the 64bit bar address 4462306a36Sopenharmony_ci * followed by size of the mapping. The bar address 4562306a36Sopenharmony_ci * requires also a valid translation in parents ranges 4662306a36Sopenharmony_ci * property. 4762306a36Sopenharmony_ci */ 4862306a36Sopenharmony_ci ranges = <0 0 0x02000000 0 0xdffe0500 0x100 4962306a36Sopenharmony_ci 1 0 0x02000000 0 0xdffe0600 0x100 5062306a36Sopenharmony_ci 2 0 0x02000000 0 0xdffe0700 0x100>; 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci i2c@0 { 5362306a36Sopenharmony_ci #address-cells = <1>; 5462306a36Sopenharmony_ci #size-cells = <0>; 5562306a36Sopenharmony_ci compatible = "intel,ce4100-i2c-controller"; 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_ci /* The first number in the reg property is the 5862306a36Sopenharmony_ci * number of the bar 5962306a36Sopenharmony_ci */ 6062306a36Sopenharmony_ci reg = <0 0 0x100>; 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci /* This I2C controller has no devices */ 6362306a36Sopenharmony_ci }; 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci i2c@1 { 6662306a36Sopenharmony_ci #address-cells = <1>; 6762306a36Sopenharmony_ci #size-cells = <0>; 6862306a36Sopenharmony_ci compatible = "intel,ce4100-i2c-controller"; 6962306a36Sopenharmony_ci reg = <1 0 0x100>; 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci /* This I2C controller has one gpio controller */ 7262306a36Sopenharmony_ci gpio@26 { 7362306a36Sopenharmony_ci #gpio-cells = <2>; 7462306a36Sopenharmony_ci compatible = "nxp,pcf8575"; 7562306a36Sopenharmony_ci reg = <0x26>; 7662306a36Sopenharmony_ci gpio-controller; 7762306a36Sopenharmony_ci }; 7862306a36Sopenharmony_ci }; 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci i2c@2 { 8162306a36Sopenharmony_ci #address-cells = <1>; 8262306a36Sopenharmony_ci #size-cells = <0>; 8362306a36Sopenharmony_ci compatible = "intel,ce4100-i2c-controller"; 8462306a36Sopenharmony_ci reg = <2 0 0x100>; 8562306a36Sopenharmony_ci 8662306a36Sopenharmony_ci gpio@26 { 8762306a36Sopenharmony_ci #gpio-cells = <2>; 8862306a36Sopenharmony_ci compatible = "nxp,pcf8575"; 8962306a36Sopenharmony_ci reg = <0x26>; 9062306a36Sopenharmony_ci gpio-controller; 9162306a36Sopenharmony_ci }; 9262306a36Sopenharmony_ci }; 9362306a36Sopenharmony_ci }; 94