162306a36Sopenharmony_ci* Two Wire Serial Interface (TWSI) / I2C
262306a36Sopenharmony_ci
362306a36Sopenharmony_ci- compatible: "cavium,octeon-3860-twsi"
462306a36Sopenharmony_ci
562306a36Sopenharmony_ci  Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs.
662306a36Sopenharmony_ci
762306a36Sopenharmony_ci  or
862306a36Sopenharmony_ci
962306a36Sopenharmony_ci  compatible: "cavium,octeon-7890-twsi"
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci  Compatibility with cn78XX SOCs.
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci- reg: The base address of the TWSI/I2C bus controller register bank.
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci- #address-cells: Must be <1>.
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ci- #size-cells: Must be <0>.  I2C addresses have no size component.
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci- interrupts: A single interrupt specifier.
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ci- clock-frequency: The I2C bus clock rate in Hz.
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ciExample:
2462306a36Sopenharmony_ci	twsi0: i2c@1180000001000 {
2562306a36Sopenharmony_ci		#address-cells = <1>;
2662306a36Sopenharmony_ci		#size-cells = <0>;
2762306a36Sopenharmony_ci		compatible = "cavium,octeon-3860-twsi";
2862306a36Sopenharmony_ci		reg = <0x11800 0x00001000 0x0 0x200>;
2962306a36Sopenharmony_ci		interrupts = <0 45>;
3062306a36Sopenharmony_ci		clock-frequency = <100000>;
3162306a36Sopenharmony_ci
3262306a36Sopenharmony_ci		rtc@68 {
3362306a36Sopenharmony_ci			compatible = "dallas,ds1337";
3462306a36Sopenharmony_ci			reg = <0x68>;
3562306a36Sopenharmony_ci		};
3662306a36Sopenharmony_ci		tmp@4c {
3762306a36Sopenharmony_ci			compatible = "ti,tmp421";
3862306a36Sopenharmony_ci			reg = <0x4c>;
3962306a36Sopenharmony_ci		};
4062306a36Sopenharmony_ci	};
41